11-05-2009 03:04 PM
Have a Design Question here:
Im using a DMA FIFO here to stream data from Target to Host. On the Host side, I have been using the FIFO Read Functinon, converting it to Dynamic Data and displaying in on a Chart in 'Real Time'. Easy enough.
I'd like to make this more functional however. The signal coming in is essentially a Square Wave. I want to trigger on a rising edge, and then continously graph the result in the chart. I tried adding the 'Trigger and Gate' express Vi, but its spotty (see attached pic).
Am I on the right path, or should this be done a different way? I havent been able to find any specific examples for this. I think Im getting messed up because my data is being read in from the FIFO as a 1-D array, 5000 elements at a time. All the other examples I've found just show signals that are being generated on the Host already at a fixed frequency.
Thanks!!!
Solved! Go to Solution.
11-06-2009
04:13 PM
- last edited on
11-07-2024
12:09 PM
by
Content Cleaner
Bones349,
Hello! A few ideas/questions
1.) You could do edge detection in your FPGA thus saving you lots of processing due to not needing to pass irrelevant data up to the Host code.
2.) What are you doing by splitting numbers before converting them to dynamic data type? I'm not surw what's going on there. You could use a waveform datatype instead as it would have a time element to your data.
3.) Passing 5000 elements at a time through your FIFO should be just fine.
11-12-2009 12:51 PM
Ben,
Thanks for the suggestions.
I will keep the edge detection in mind, but for now, I need to pass all of the data.
Im splitting the numbers because they are two I16 numbers being passed through the FIFO as U32. I guess there would half the processing needed if I did the dynamic conversion (or convert to waveform data), before splitting them? I did end up using the waveform datatype, and I have a pretty solid solution going on now.