How to build FPGA vi with multiple modules?

[WDD]

Hi,

I am using four modules with FPGA, NI9870,9871,9211, 9263. FPGA vi is built in interrupt method at the moment and four interrupts for each of module's work. The problem is that too many INTERRUPTS leads to very slow data acquisition rate. What do you usually do to make multiple modules work simutaneously with FPGA?

Thanks,

Wenli

[Chris_Garratt_NIUK]

Hi Wenli,

I would like to help you with your problem.

Can you describe your problem a little more? What is your reason for using interrupt mode? Would it be possible for you to post your code on this thread for me to look at?

Best Regards,

Chris

[Chris_Garratt_NIUK]

Hi Wenli,

Can you also list what software versions you are using?

Thanks,

Chris

[WDD]

I am using 9871 and 9263 to control my machine. 9870 is to read pressure by a pressure transducer and 9211 is connected to thermolcoupls.

I am a new learner of FPGA. Interrupt method is learned from examples and I don't know much other FPGA method. That's why I need advices. I think this question should be very basic because most machines need not only one module to control the movement and read&write data, however, the examples provided by labview software are almost with only one specific module, which should be useful to learn the basics of that module. I will really appreciate if I can see any example which combined modules in one project and run them together.

My FPGA vi is attached here. In which, you can find that there are just 5 WHILE LOOPs with INTERRUPTS simply stacked for different ports.

Softwares I am using:

Labview 2010        

Laview Real-TIME 10.0.1

Laview FPGA 2010

Laview compilation tools

NI-RIO 3.6.1

NI-RIO IO Scan 1.6.0

NI-Serial RT 3.7.1

NI-Serial 9870 and 9871 Scan Engine supported 3.7.1

[WDD]

Need help...

[Lewis_G]

Hey,

I think your problem may be due to you calling the Interrupt VI simultaneously in multiple loops.  Each loop is truly running in parallel on the FPGA so it is likely that different loops are all trying to access the interrupt channel at the same time.

I found this information from the Interrupt VI help.  "The Interrupt VI is a shared resource, so multiple uses of it induce additional delay and jitter due to arbitration."

Why are you using these interrupts? What is happening in your host VI where the interrupts are read?

Lewis.

[WDD]

Lewis,

Thanks for your reply.

I know that description of INTERRUPT. I am looking for an alternative way to build FPGA vi including different kinds of modules.I also heared that placing each module in an independent loop would increase the speed. If there is just simple read/write to ports in their loop without interrupt, some module would not work. I guess module 9871 is occupying CPU all the time due to RS485 has higher priority than RS232. Therefore, I have to set interrupt to each of them...

In my Host vi, I have to apply ACKNOWLEDGE IRO and WAIT ON IRQ to each module's work. Three modules read data in high frequency (should minimum be 20Hz). So they are are all trying to access the interrupt channel, which results in very slow performance.

I really appreciate any little help.

Regards,

Wenli

[Lewis_G]

Hi Wenli,

When you say the 9871 module is occupying all of the CPU time, do you mean the code running on your Real Time system?

I don't think there is a need to have any interrupts and similar functionality could be achieved using a DMA FIFO (Like a queue).

Can you send me all of your code so I can see what is going on?

Lewis

[WDD]

Lewis,

Thanks for your very kind help. But all of the code is huge, I am afraid I can't attach it here. Could you please drop me an email? So I can send you the code by eMail?

Sincerely,

Wenli

[WDD]

Here is my eMail address:

w.dang@ed.ac.uk