How to scaling waveform chart to real-time in FPGA FIFO

[soljiang]

I don't know how to scale my wavechart to show my real-time signal.  For example, in this application, I would like to display a 2 VPP 100 Hz sine-wave voltage signal on my wavechart.  I set my Host vi loop rate to 10 ms, while my FPGA sample rate is 100 KHz.  What should I do is I want my X-axis has ten unit length and it reprents 10 ms, in which case the frame should contain one period of the sine wave?  And I suppose if I change the denominator into 1000, the rate of change should be in second.  However, seems it doesn't work in this way.  I attach project and both host and fpga vi.  

Also I try to scale Y axis to show +/-1V of 2VPP signal.  I used the scaling factor offered by the example vi, but seems it's not right.  the formula is (1V*x)/32767.  I don't know what 32767 stands for in the example vi: it doesn't seem to me the greatest double precision floating number.  

Thank you very much for your help.

[soljiang]

I believe 32767 is the largest I16 number but what's shown on the vi front panel is that the Vmax is approximately 0.25V while the signal I measured on my oscilloscope is Vmax=1.01 V.  I can't see where the problem is with the scaling on my vi.  Thank you.

[Robbob]

Soljiang,

Your Data Type conversions are inaccurate.  You bring in a I16 value from your read, which is the bit representation of your signal.  Then you pass it into a U32 FIFO, which changes the bit representation.  However, once you are on the RT side, changing a value that is U32 into a I16 makes no difference. (Changing a 4 represented in U32 is a 4 in U16 on RT) You then change this into a DBL.

My recommendation: Convert your number to Fixed Point on the FPGA and do your scaling there. Change your FIFO to handle Fixed-Point numbers of the required Integer and Decimal bit values.  FPGA is fast and great for conversions like that.  That way, when you read your FIFO on the RT side, your values are already scaled properly and you can wire directly into your graph.

Let me know if you need some more details on how to implement this.

[soljiang]

I'm sorry that I'm somewhat confused about using fixed-point number that you mentioned.  Would you please provide more details on how to implement it?  Some details would be really very much appreciated or if possible could you make some change on the vi?

Also I'm a bit confused about the FPGA card.  Is the data collected from the signal directly changed into integer after A/D converter or gate array, which indicates that the number flow out of the analog output I/O function on FPGA vi is always an16-bit integer?  Thank you very much.

[soljiang]

Also, would you please give me some instructions on the scaling of X-axis to show real time?  Thank you very much.

[Robbob]

Soljiang,

This is how you convert to Fixed Point on FPGA.  On the numberic pallette, there are the conversion VI's.  For a FXP conversion, you wire a constant into the top input to determine the bits used to represent the number.  4 bits is enough for the integer portion, since that will give us (-8,8) range on your signal.  For decimal bits, something like 16 or 20 will work fine.  Right click on the top node, do create->constant, then right click on that contant and set these settings. Be sure the value is signed as well, in case you have negative voltages.

You will also have to go into the project and right click on your FIFO and set it to fixed point as well, with the same data bits.

This will give you numerical data as soon as you read it in on your host VI, rather than bits.  The scaling will be resolved as well since you are no longer incorrectly converting between U16, U32, and I32.  You will no longer need conversions on the RT side, since most VI's can handle fixed-point calculations.

[Robbob]

Message Edited by Robbob on 03-23-2009 05:40 PM

[soljiang]

Hi, Robbob,

Thanks a lot.  However, I met some problem in implementing this.  First I used what you showed in the diagram and I used 4 bits for integer and 20 bits for word length and used signed.  However, I can't change FIFO into FXP.   As shown in the picture attached, the FIFO data property data type is not editable in Target-Host DMA mode.  It's only editable in Target-scope mode and even in that mode FXP is not listed.  

Also did you mean that I don't need to do any scaling at all?  I attached a picture front panel.  Even though it might be due to sample rate setting that the collected sine wave become a square wave, but no matter how I adjust the amplitude, the wave shown on the chart goes the same, without any amplitude change.  It might be due to the wrong FXP setting on FIFO.  Could you tell me how to fix it?  If possible, could you do some editing on my vi's and attach them? Thanks a lot.

Also could you tell me how to scale the X-axis to show the real pass of time in second?  Thank you very much.

I appreciate your help.

Best,

Charles

[Robbob]

Soljiang,

I won't write code for you, but I can get you on the right path.

Sorry that you couldn't configure your FIFO for FXP, this was added in a later version of the driver, I don't recall exactly which one, however.  Which version of FPGA and NI-RIO are you using?

If you want to set up your graph to show time, you need to use the 'Build Waveform.vi'  This will allow you to set a t0 and dt which is saved in waveform data. When this is written to a graph or a chart, it will update the x axis based on time.  Do not use the property node you are using, it is only causing problems, as you probably already found out.

[soljiang]

Thank you very much. I will try build waveform vi.  The FPGA I'm using is NI PCI-7833R.