Real-Time Measurement and Control
Is deterministic serial/RS232 possible?
Solved!
I have a frequent need to perform well-timed serial control of a custom instrument we build. Basically, I need to send a packet of serial data at a very specific, accurate rate; usually in the 100 Hz to 1kHz range.
I currently accomplish this by bit-banging the protocol using DAQmx. This obviously gives excellent timing, but there's a lot of overhead to generate all of that data, and it's not exactly "simple".
Can any of the LabVIEW RT devices provide "deterministic" serial timing? The only thread I found on that was nearly 2 decades old. Back then (at least), the answer was that serial wasn't deterministic, but you could do some testing and maybe get "good enough" for a given application.
I know I can use USB-to-serial devices with cRIO's, but their drivers do not give the level of control I need (i.e., I can control when to call the "VISA Flush" command, but the driver doesn't HAVE to physically write to the hardware at that time).
Many cRIO's provide built-in serial ports but I can't see if they're deterministically timed. The 9870/9871 add serial ports via expansion card, but I don't see any info on how to control them other than "they connect directly to the FPGA". Obviously I could program the FPGA to bit-bang my own serial devices, but honestly if I'm going to go that far I'll just use an ESP chip or something and save a few thousand dollars 🙂
Generally speaking, the stack of code required for UART RS-232 will disqualify the "deterministic" requirement. As far as I am aware, the 9870/9871 on work with a cRIO using the FPGA interface. But going with the FPGA will give you the most deterministic communications path.
@crossrulz wrote:
Generally speaking, the stack of code required for UART RS-232 will disqualify the "deterministic" requirement. As far as I am aware, the 9870/9871 on work with a cRIO using the FPGA interface. But going with the FPGA will give you the most deterministic communications path.
Good to know, thanks! I knew that was the case for the SILabs, FTDI, etc. but couldn't figure out if NI's version was any different (I haven't used NI-Serial before, only VISA). All I need is the serial data comms, so going the FPGA route is WAY overkill for this program.
I'm going to try using a clock to trigger the CTS line on a cheap serial converter and see if I can get that to be "deterministic". In my case I don't care about time between the "go" command and the first packet coming out, but I need the overall rate to be timed very well, and all of my packets are pre-generated ahead of the test.
