I have a setup that I thought was going to be very easy and straightforward, but now that I've gotten started, I'm not sure I can do what I set out to do. Here is the scenario:
I have a cRIO-9045 populated with primarily Input C-modules. I have two cRIO-9145 EtherCAT expansion chassis with an identical set of output C-modules. The task is that the 9045 is to read an array of sensors, then output the same values to two separate systems. We went with FPGA-based hardware as we wanted it to be fast, reliable, and require no user interaction to function.
I have the outputs in both 9145s working just fine by using user-defined variables as their inputs. I wrote VIs that I compiled and downloaded to their FPGA Targets as I want them to run immediately on power-on. Based on examples, I created a VI on the RT side of the 9045 to sample the data and write it to the 9145's user-defined variables. However, I need this to run as "hands-off" as possible and would rather write code to compile and download to the 9145's FPGA. This is where my problem exists as I cannot write to the 9145 user-defined variables from a 9045 FPGA Target; I can only read them. I tried looking into peer-to-peer FIFO, but it appears my combination of hardware doesn't support that style FIFO.
Am I missing some other sort of data communication method between chassis? As far as I can tell, the only way to send/receive data from the EtherCAT chassis is to use user-defined variables. Any suggestions?
-Warren
