06-06-2018 04:05 PM
I have a NI 9149 with the following modules:
Slot1: NI 9870
Slot2: NI 9872
Slot3: NI 9421
Slot4: NI 9426
Slot5: NI 9426
Slot8: NI 9870
When the eRIO has no FPGA bit image on it (restored to factory default) and just the NI 9870 modules configured for scan mode, then the VISA resource communicates normally and successfully.
In my LabVIEW project, I have the two NI 9870 modules in Scan Mode, and module 2-5 are connected to a custom FPGA image. When my FPGA bitfile is on the eRIO, then the 9870 module has bizarre communication errors. Sometimes is acts responsive but does not actually send the message. Sometimes the VISA resources does not appear on the network at all. The reliability of the communication is so low that the system is unworkable.
Is there a known issue between scan mode modules and FPGA modules that an eRIO can only do one or the other? Can FPGA code interfere or block scan mode modules? What's the most robust way to have Scan Mode modules and FPGA modules side by side?
06-07-2018 02:35 PM
Hello Beutlich,
I found this article that explains the basics of what you want to do: How Can I Use Scan Engine and FPGA Simultaneously on a CompactRIO (Hybrid Mode)?
I think you might like to give it a look.
-Anyela