Noise in FPGA Instantaneous Frequency, not in Software

[jarrisonwins]

Hello,

We are implementing an analysis on FPGA which takes a signal and computes the instantaneous frequency using a hilbert transform. We implemented it on FPGA and in software and have noticed that there is a significant source of noise in the code that was running on the FPGA that is not present in the software implementation. Attached are the two implementations. the phase is obtained from these hilbert transforms, and a derivative is used to compute the instantaneous frequency. An example of the kind of noise that we see is provided, with the signal being a chirp from 290 kHz to 305 kHz. Any advice on where this noise is coming from would be greatly appreciate. I have assumed until now that it may be some kind of fixed-point issue that i do not quite understand.

[JLewis]

You've got a lot of moving parts here, so I think you're going to have to break down the problem into stages in order to isolate the noise source. You're definitely losing precision at the fixed-point IFFT, where the inputs are coerced from <s, 31,16> to <s, 24, 16>. I would recommend starting with the float version and inserting To Fixed-Point conversions in your For loop to mimic the types you have on the FPGA diagram (one to quantize the FFT output, another to convert the multiply output to <s,24,16> and finally you'll need another loop after the IFFT to convert that array to <s, 31, 17>). Also make sure you quantize the floating-point inputs as well to match the type of the I/O you're using for the FPGA, so you're doing a fair comparison.

This won't be bit-true with the FPGA version, but should give you a feel for how much noise the FXP quantization is introducing. If this model exhibits similar noise behaviors, then you can insert/remove coercions one-by-one to get a feel for which one is responsible for the most loss of precision.

At that point, the fix involves analyzing the ranges needed on each wire by the signals that you're interested in. I see a couple minor optimizations you could try on your FXP paths, but you may find that you simply need more precision than the FPGA FFT provides. If that turns out to be the case, an alternative is to use the Xilinx coregen FFT (on the Xilinx Coregen IP palette). It can be a bit more difficult to work with, but has a lot more options and should be able to provide the precision you need.

Jim

[jarrisonwins]

Thank you for your reply. Those are good ideas and will definitely help me better understand the problem. I will work on this today and let you know if any is progress is made.

[jarrisonwins]

I have built out the Hilbert transform, this time using the Xilinx FFT core. Attached you will find the VI i used. Unfortunately the same noise seems to be appearing as before. Let me know if you are able to provide any more advice.

[JLewis]

The VI attached looks pretty much the same as the last one. Have you investigated the effects of fixed-point quantization using the float model? It takes a lot of time to go to hardware, so I would concentrate on desktop simulation first. Work from both ends: modify your float model to include quantization and run it on My Computer. In your FPGA VI, replace the input FIFOs with your own quantized signal source and replace the output FIFOs with some code to build arrays from the valid outputs. Then run it in the "Execute VI on Development Computer" mode and see how those results compare with the quantized float model results.