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Open FPGA VI Reference bug?

Using LV 7.1, LV FPGA 1.1.0, along with a PXI-7831R.
 
I developed code for the 7831R using a PXI version but when I try to use 'Open FPGA VI Reference' and right-click to select FPGA as the PCI version for the target all my 'HW Exec Ref' links break. It appeaers to be an issue with the 'HW Exec Ref' control inside the cluster. Has anyone seen this before? Its not the end of the world just annoying... possibly I am overlooking something here??
Attached is a vi with 2 indicators... one produced using PXI and the other using PCI.
Thanks.
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Hi plf,

This is an expected behaviour. If you develop your FPGA code targeted to a PXI-7831 but then specify it as a PCI-7831 in your host vi, the 'HW Exec Ref' link will break. Is there a particular reason why you would want to specify it as a PCI in your host?

Regards,
Prashanth

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The Host is downloading the code and executing it on the FPGA using 'Open FPGA VI Reference' and then the reference generated  as a result of this is being used by additional code running on the Host to monitor the status of the routine.

What I developed on the PXI version is now being used in another department that has both PXI and PCI versions of the 7831R and they would like only one set of source code... I had them make 2 'HW Exec Ref' controls and save them as strict typed defined controls one for the PXI, HW Exec Ref[PXI].ctl, and one for the PCI, HW Exec Ref[PCI].ctl. The source code was then updated using one of these strict defined controls named as simply 'HW Exec Ref.ctl'

Now when they go to use the code they must first copy the HW Exec Ref [xxx].ctl control with the proper bus type and rename it to simply 'HW Exec Ref.ctl' Upon loading the code the proper control is used and then it is a simple matter of selecting the target if needed my right clicking on Open FPGA VI Reference and making the corresponding selection. Not the most graceful approach at the moment but acceptable.

Peter

 

 

 

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Hi Peter,
 
There is no simple programmatic way to dynamically change the target specification from a PXI to a PCI in the FPGA host vi. When the 'Open FPGA VI Reference' vi is right clicked and a target type is selected, the HW Exec Ref output is changed. When this reference is wired to FPGA host interface VIs such as Read/Write nodes, the code underneath these nodes are automatically scripted for the target specified. These nodes cannot be re-scripted at run time and hence the FPGA target must be specified at edit time. Future releases of LabVIEW FPGA may address this issue but for now your workaround may have to suffice. Have a great day!
 
Regards
Prashanth
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