10-13-2013 06:46 AM
I downloaded the Periodic Waveform Generation with LabVIEW FPGA (Memory Read and Write) example and wanted to run it on my computer first so i selected the proper debugging option in FPGA target properties. I didn't modify anything in any of the files, yet when i run the host VI I get the following message: "Execution already in progress. Another FPGA VI for this target is already executing on the development computer. Stop the other VI before running this VI." It seems to happen when the FPGA_Periodic_Load subVi is called. Since I'm new to cRIO, I have no idea what might be causing this. Any help would be appreciated.
10-14-2013 08:40 AM - edited 10-14-2013 08:41 AM
Dear dahlianoir!
Do You mean by "i selected the proper debugging option in FPGA target properties" that Yoo are executing the FPGA VI on the development computer?
Are You only running the FPGA VI or also the RT host?
Debug mode fro FPGA VI has limited capabilities related to using IO, proper timing and so on.
The FPGA_Periodic_Load subVI is used by the RT host VI, so it should not influcence how the FPGA VI runs.
What is the pupose of Your poject?
For waveform generation and acquisition the NI CompactRIO Waveform Reference Library could be a better solution.
http://zone.ni.com/devzone/cda/epd/p/id/6206
Bes Regards,
10-14-2013 09:34 AM
Yes, I am executing on the development computer. I'm running the host VI only since the subVIs it contains open the reference to the FPGA VI (FPGA_Periodic_Start) and then run it via Invoke Method (FPGA_Periodic_Load).
I tried changing it a bit: deleted the Invoke Method - Run node (in FPGA_Periodic_Load) and in the Open FPGA VI reference (in FPGA_Periodic_Start) I checked the "Run the FPGA VI" option and now I don't get the error message anymore.Still, I'd rather make it work without deleting the node.
What I want to do, for now, is to basically generate a sine wave with adjustable parameters like amplitude or frequency and send it to an analog output. I should've mentioned that the hardware I have is sbRIO 9636 and not CompactRIO but since I'm a total beginner I decided to follow the Periodic Waveform Generation with RIO Enabled Hardware and LabVIEW FPGA
tutorial. Therefore, the examples attached to it were designed for cRIO but after some adjustment should work with my hardware also(?). If there is a better way of achieving my goal I'd be thankful for suggestions. As I mentioned, I'm just starting out so analyzing a completed example seemed like a good idea.
10-18-2013 04:46 AM
Dear dahlianoir,
In my opninion the reason of Your problem is caused by the porting this cRIO project to sbRIO.
What You have to do to port the example succesfully on the sbRIO:
- Create the sbRIO target into the example project
- add the FPGA target to the chassis
- create copies from the exmaple VIs (modification will be needed)
- add the copied VIs to the FPGA and RT level of the new target
- modify the FPGA code: delet the calibration part, and change the IO ndoe to the AO oc Connector 0
- compile FPGA code
- modify RT host code: delete calbiration related pars: entire for loop in FPGA_Periodic_Load
- configure the open FPGA reference node in the FPGA _Periodic_Open_Ref VI: add the new FPGA VI of the sbRIO target, or the new bitfile
- the refernce output of the node will change, so You have to create a new indicator.
- all the FPGA reference controls and indicators of the subVI have to be changed (copy the one from the FPGA _Periodic_Open_Ref VI)
- I recommend to use type definition
Follwoing these steps, the applications should also work with the real HW.
Please let me know, if errors still occur. Please in this case attach screenshots, ir the particular VI hat causes the problem.
Please allow me to recommend the cRIO developers guid, for Your further development:
http://www.ni.com/compactriodevguide/
Bes Regards,