10-04-2005 01:47 PM
10-10-2005 05:35 PM
Hi Jeff,
Below are some answers to your questions.
1) You can create FIFOs on Flip-Flops, Lookup Table or Block Memory on your FPGA hardware. These options appear when you place the FIFO Read/Write VI and double click on it to create an instance of a FIFO.
65535 is the limit to the FIFO depth regardless of the datatype you choose.
2)One way to increase through put is to pass data in 32bit chunks. So if you have two I16 numbers you can use the ‘Join number’ vi to make it a 32 bit number and pass the data through the FIFO. Then, use the ‘Split number’ vi after you read from FIFO to get back your original I16 numbers. Go to Functions -> Advanced -> Data Manipulation palette to find the
3) Since the 9215 has only one Analog to Digital converter, there will be some delay between samples from different channels. They are not sampled simultaneously.
Hope this helps!
Prashanth
10-10-2005 07:33 PM
10-11-2005
08:36 AM
- last edited on
03-12-2025
03:33 PM
by
Content Cleaner
Hi Preston,
Thanks for catching that. I mistook the cRIO-9215 for a different AI module. The product webpage for the cRIO-9215 clearly states that it is a simultaneous sampling module. https://www.ni.com/en-us/shop/model/ni-9215.html
Regards,
Prashanth
03-19-2007 06:10 AM
03-20-2007 02:43 PM
bmann:
This forum has been inactive for 1 1/2 year. Post if you have any other questions.
Thanks,
Rudi N.
03-21-2007 06:16 AM
03-21-2007 06:20 AM
thanks, I posted the message to the wrong thread by mistake. I was reading up on DMA, then I got the DMA transfer working in LV8.2 this week.
I was actually looking for example code for USB access using the cRIO-9012, but should hopefully get it via another post.