RT application doesn't talk to FPGA properly when run as startup

[JohnGrove]

Hello LabVIEW users!

I have an sbRIO RT application, including FPGA CAN message filtering and a few other FPGA IOs, which runs fine when launched from the Windows project tree, but which does not see the correct FPGA data when built into the startup application.

The whole project is an evolution of a previous project, which had been working fine for a long time, and I just made a few changes for it to use a different CAN database. All the changes work as expected when launched from the PC.

It appears that when the RT is launched from the PC the links to the FPGA are good, but become bad when the RT is run as startup.

I've compiled, erased and flashed the FPGA code several times, and rebuilt the RT application several times, with no effect.

Any suggestions?

[Larry.C]

Hello John,

I have taken a look at your post and have a few questions so that I can get a better understanding of the problem:

Am I right in assuming the previous version of your project deployed correctly on your sbRIO without this problem you are experiencing now?

Would it be possible to try re-deploying the older version of the project to see if the problem persists?

When you build your RT application what settings are you using?

Would it be possible to take a look at your project?

Also, what version of LabVIEW, Operating system and drivers are you using?

Sorry about the many questions.

Kind Regards,

[JohnGrove]

Hello Larry,

I think the problem was with the FPGA target settings.

I checked the FPGA Target/RIO Device Setup/Device Settings, and it was set to "Autoload VI on device powerup", which I changed to "Autoload VI on device reboot", and that may have fixed it.

I'll post back if the issue returns.

Regards,

John.

[JohnGrove]

Hello again,

Well, I was wrong about the FPGA target settings, the issue has returned, and is definitely related to the RT application build.

I tried making a small change to an RT VI, re-built the RT application, ran as start-up, and the FPGA related IO's were nonsense again.

I then simply copied the previous version of startup.exe to the startup folder via FTP, rebooted and it's working again at the previous level.

It seems I have to rebuild the RT startup application several times, and eventually it works.

I don't understand how any settings in the build spec. could cause this behaviour.

I'm running LV2010 DS2 and RIO 3.5.1

[Larry.C]

Hi John,

Does that mean that you build the RT app and it fails. You repeat this multiple times with the same settings and eventually one deployment might work?

Would it be possible to take some screenshots of your deployment settings? Or would it be possible to have a copy of your VIs so that I could try to deploy it on a cRIO here?

Kind Regards,

[JohnGrove]

Hello Larry. C,

Yes, that's exactly what I mean.

Do you have an e-mail I can send some screen shots to - I can't attach anything to the post?

Thanks,

John.

[JohnGrove]

Here are the build spec screen shots....

[JohnGrove]

If anyone's interested, I think the solution is that after the FPGA VI has been changed and compiled, all top level RT VI's must be force compiled (by control-clicking or control-shift-clicking the run button) before they are built into the RT application.

Since doing that, the RT application has worked first time.

[grivilla]

I'm having similar problems but:

I use one PXI chassis and two 7813R FPGA cards.

software: Real-Time 11.0, NI-Rio 4.0.0, LabView 11.0

Running the RT-executable, the RT-API-VI to the FPGA does not get any data from any of the two FPGAs. However, the RT-Program  gets correct data if it has been started  from theLabView  Project.  I did the described procedure of mass compiling and building several times and on two different PXI- chassis without success. It does simply not work. 

Any suggestions?

thans.

[IanC_]

I've also recently started to have this problem.  After an FPGA VI has been rebuilt, if I run the RT VI from a host PC it picks up the new version automatically, but if I then build it into an executable it reverts to an older version.

My workaround is to open the Open FPGA VI Reference dialog box and reselect the bitfile I'm linking to - this is enough to fix the problem (I'm using dynamic FPGA refs, which may be why I don't have to mass recompile).

Ian

(LV2010 SP1)