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Unable to compile FPGA code which was initially good

I have a FPGA application that uses crio 9004 and 9101.  The project file was initially good and the fpga vi can be compiled and runs well. However, after several months, now I want to recompile the fpga vi, then it failed, with the following message:
 
Release 7.1.03i - Xilinx CORE Generator IP_H.16
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.
Regenerating IP...
   the output directory. Output products for this core may be overwritten.
ERROR:coreutil - Failure to generate output products
Finished Regenerating.
Regenerating IP...
   the output directory. Output products for this core may be overwritten.
ERROR:coreutil - Failure to generate output products
Finished Regenerating.
Regenerating IP...
   the output directory. Output products for this core may be overwritten.
ERROR:coreutil - Failure to generate output products
Finished Regenerating.
Regenerating IP...
   the output directory. Output products for this core may be overwritten.
ERROR:coreutil - Failure to generate output products
Finished Regenerating.
Regenerating IP...
   the output directory. Output products for this core may be overwritten.
ERROR:coreutil - Failure to generate output products
Finished Regenerating.
Regenerating IP...
   the output directory. Output products for this core may be overwritten.
ERROR:coreutil - Failure to generate output products
Finished Regenerating.
Regenerating IP...
   the output directory. Output products for this core may be overwritten.
ERROR:coreutil - Failure to generate output products
Finished Regenerating.
Nothing has been changed for the fpga vi. So why would the compilation fail?
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Have you change the configuration of any of your software? ie new cRIO driver or anything like that?
SteveA
CLD

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FPGA/RT/PDA/TP/DSC
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No, nothing has changed on the crio part. No new device. No device has been changed.
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Updates: I copied the project file to another computer with the same Labview 8.0 windows xp (actually, installed from the same cd), and the vi compiles perfectly.  No problem at all.  But after I copied the compiled project back to the first computer, it wouldn't compile again, with exactly the same message. 
However, if I create a new project on the first computer (the one which failed to compile the existing fpga project), and create the same fpga vi with the same components and device configuratoins, the newly created fpga project compiles fine. So, it seems the project files are correct, the computer can create and compile fpga vi, but it just will not compile the fpga vis in the existing projects that I used that exact same Labview installation to create months before. I tried several saved ones, none of the fpga vis in the old projects compiles on the first computer with the same message, and they all compiles fine on the other computer.
What's the problem? Is there anything with Labview?
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Hi LyLee,

 

It seems like you used the same files in a new project and it worked, is this right?

 

There are few things you can try to resolve your issue;

- Update your NI-RIO driver

- Create a new project with exactly the same files and re-target the cRIO

- Mass compile

 

This problem occurs occasionally whenever modules are upgraded. So you might want to check if you had any upgrades from the version that the previous projects have been made in.

Aashish M
CEO
TransferFi
www.transferfi.com
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labview fpga was unable to contact the compile server - this computer has compiled the same vi without problems.

I have rebooted, verified that it is set to same ip address it is looking for (192.168.0.5).  During the day I do use

the laptop for other network settings (set by DHCP) but then I always set it back to 192.169.0.5 and it only

works 20% of the time.  

 

 What other feature or function does NI looking for to run compile server?

 

io io

 

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io io,

 

Thanks for using the NI Forums. I would ask you to create a new thread in the future for new questions like this one. Especially when the thread is more than 1 year old.

 

That being said, check out this document.

 

Why Do I Get FPGA Compile Server Errors?

 

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Ben Sisney
FlexRIO V&V Engineer
National Instruments
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