What is Host VI and RT VI in real time project

[sku1988]

Hello all,

I have just started using labview real time module 2012 and want to develop a code for cRIO 9075 .

While going through many documents it is observed that there are two parts of VIs in a labview RT project -1. host VI  2. RT VI

What exactly does that mean?

how can I deploy only RT VI on my target?

Can I run both VIs at the same time on same sytsem?

It would be grateful if anybody could post a basic documentation regarding this.

Best Regards

[crossrulz]

I don't have the full context, but my understanding is that the Host is the PC which interfaces with the RT system through TCP or the like.  The RT VI is what actually runs on the RT target.  When you throw in the cRIO, it gets a little more complicated since you can have FPGA as well.

[sku1988]

Thank you for feedback

Yeah you are right as whatever posts or documentation I am getting after web surfing are all related to FPGA target and host VI

There are not much documents on RT target & host VI

How can only RT VI be deployed on my cRIO-9075?

Can both VIs be run at the same time?

Thanks & Regards

[crossrulz]

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@sku1988 wrote:

Thank you for feedback

Yeah you are right as whatever posts or documentation I am getting after web surfing are all related to FPGA target and host VI

There are not much documents on RT target & host VI

How can only RT VI be deployed on my cRIO-9075?

Can both VIs be run at the same time?

Thanks & Regards

---

Well, when it comes to the cRIO, the RT VI is the host of the FPGA VI (which is on the FPGA target).  But the PC VI is the host to the RT VI (which is on the RT Target).  There's nothing keeping the PC VI and the RT VI from running at the same time.  They are on difference machines after all.

For the RT only in the cRIO, I think you have to enable the FPGA Scan Mode.  I have not played with that feature, so I recommend doing a search for the FPGA scan mode.  I know there's a nice white paper on it somewhere.