Overhead of sub vi's on cRIO

[Eric_Lang]

Hi,

Simple question that most likely has a complex answer.  On the cRIO system, is there a rule of thumb for the overhead associated with breaking down the code into sub vi's?  I once heard that it is generally better to keep the code flat on the real time in order to keep the overhead associated with sub vi calls down.  This may be a wives tale, since I cannot find any literature to enlighten me.

Anyone care to weigh in on the topic?

Thanks.

[crossrulz]

Maybe a long time ago it might have mattered.  But with modern hardware, even in the Windows environment, the subVI overhead is quite neglible.  If you need something more reliable (less jitter), then you should probably try to move that code into the FPGA.