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analog setup time for DAQ pci-6110

We are using a PCI 6110 to measure dynamic signals at a high frequency. We use an external scanclock on the PFI0.
I have checked the documentation that I possess, but could not find a specification for the time for a setup or hold or gate or anything like this for the analog input with respect to the active edge of the clock.
Does anybody know more ?
TIA Gabi
7.1 -- 2013
CLA
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Hello,

You might find chapter 4 of the PCI-6110 User Manual helpful. Starting on page 4-17 is a description of the onboard timing signals that are available on the PFI lines. Specifically, consider the SCANCLK signal on page 4-26. It pulses once the A/D conversion is complete and which is approximately 50-100ns after an A/D conversion begins (which would be the given from the CONVERT signal) There are also several timing diagrams that you might find interesting.

I hope this is helpful!

Best Regards,

Russell
Applications Engineer
National Instruments

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