11-29-2010 07:29 PM
I have a cRio-9073 with a 9215 and 9401 cartridge. The input is a voltage (to the 9215) and the output is a pulse-width-modulated signal to an RC-servo (by way of 9401). I have a strange problem with this that I cannot figure out: If I run the pulse generation block by itself, the pulses are perfect, and varying with a front panel control works just fine. When I include the AI block, and/or the variable to adjust the pulse width, the output becomes sparatic (verified through ocilliscope). I am not sure if there is a time delay somewhere, or I have something setup wrong. Interestingly, if I change the refresh rate of the AI block to 1 Hz (1000 msec), it works. If I go faster, the output gets garbled.
This does not have to be super fast, 5-10 Hz would be fine, but when I do that, the pulse widths are not consistent. Any ideas?
Rich
11-30-2010 09:03 AM
1. Do not use Network Shared Variables in any RT critical loops, use single process SV's or action engines to pass information between loops
2. Use the cRIO scan engine to generate PWM on the 9401
http://digital.ni.com/public.nsf/allkb/0892C8D55C6D0C0E86257585004FD0B0
3. Push PWM down into the FPGA