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can you have more than 8 open fpga reference in a single VI?

HI,

 

I am trying to use the sbRio to control a PIC which controls another circuit board. I send a digital enable signal and an analog input(reference current) to the PIC. 

I have six circuit board that i need to control. For each board i have to read the reference  current from a file and send it to the fpga. Then i read  inputs from the board and write it to the file. The each step above are in a while loop and each while loop has an open fpga reference outside of it and the reference is closed.

 

When i have the code to control 3 boards. The VI runs fine. However the moment i have a fourth board the program give me  the error "the system has run out of resources. close a session and retry the operation" (error -63198)

 

Is there a limitation to the number of open fpga target reference i can have?

How can i reuse an open fpga targer reference? I knw this is not possible since the reference will be closed

 

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Hi,

 

Are you using one sbRIO? If that is the case then you only need to open one reference and send the reference all while loops. 

Please provide a detail description of your setup and possibly a code snippet which shows what your block diagram looks like so that we can have a better idea of may be the issue.

 

Thanks!

Arham H
Applications Engineer
National Instruments
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I am using the sbRIO scanned A0 and simultaneous AI to do that. To do that for each circuit board that is being tested i am using 2 open fpga target. One to send information and another to collect information. The moment i have 8 open target fpgpa reference i get an error. 

 

 

Thx

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Hi,

 

Are you using a separate bit file for each reference that is being created? Do the loops have to be run in parallel or can they be run in series? If they can be run in series and are referencing the same bit file then you can just use one FPGA reference and use error wires to force a series order of execution.

 

Regards

Arham H
Applications Engineer
National Instruments
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I am using the same bitfile for each reference. Yes the loops have to be in parallel but i guess i could add a delay between them.

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Same bit file to the same target?  Then why do you need multiple refrerences?  Just open the reference once and pass the reference to all of the loops.  You then close the reference after all of the loops have completed.



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Yes i tried that but when i debug the code it says the reference is not executed.

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Hi yajT, check this:

openRef.PNG

 

 

 

 

 

 

 

 

 

 

 

 

 

Here the link for more info:

Open FPGA VI Reference Function

 

regards

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