Hi.
In most of FPGA exaples I see, there is usually 1 FPGA vi that aquires data from multiple channels.I must be missing something fundamental, b/c, I have a rather complicated program I had work flawlessly in DAQmx, where I use DIO, AI and AO at diffrent subvis. Now, since converting my code to FPGA, my top priority host VI triggers a digital clock and an analoog output, and a host subvia aquires data (and if selected, outputs an analog waveform), another host subvi, write a waveform to the memory block, and yet another host subvi aquires data from another channel.
So the question here is, when I run my finished host Vi, I get errors saying that the FPGA is busy. Can the FPGA run one Vi at a time? I need to run multiple fpga vis sometimes overlapping with eachother.
i also want to point out that i have no errors in running each fpga vi indipendantly, and I never have douple calling issue (each host subvi calls on a previously unopned fpga vi and closes it when done).
If someone has mannaged to decode my rant, 🙂 does this mean that I have to combine the functions all fpga vis into one giant fpga vi with multiple triggerable loops? meaning the fpga vi remain open, and each host subvi will boolean executes a loop (which was previously an fpga vi by itself) ?
I would upload vi but, my code only works as a unit and it has many many subvis.I would appericiate any help especially answering my central question, does fpga only have capacity to excute one vi at a time?
thanks loads-
ArifH
