open two fpga references

[millansf]

Hello!

It´s properly to open two FPGA references in the VI host?

I have only one VI FPGA, but it contains a while loop, and a secuence. So I want to execute the while loop continually while the secuence is execute only one time...

thanks!

[JaimeC]

No...

that is not possible due to the fact you have to recompile the code and program the FPGA again then...

You should manage to make it programatically,

Regards,

[millansf]

Ok, thank you very much

[Tunde_A]

You can open multiple references to the same FPGA VI (or bitfile) on the host. However, you cannot open references to different FPGA VIs at the same time on the host. In order to communicate with different FPGA VIs on the host, you must first close reference to one before opening reference to another.

Tunde A

LabVIEW FPGA

[dwisti]

You can open multiple references to the same FPGA VI (or bitfile) on the host but how do remote hosts (via VI Server) fit into this?  Can you open multiple references remotely?

[Shree_Nivas]

Hi,

I need to use the same FPGA Target reference at two different VIs. I tried in two different ways.

Method 1: Opening the FPGA Reference at two different VIs - It works.

Method 2: Opening the FPGA Reference at one VI and writing the reference to the Single-process shared variable (Type def: Dynamic FPGA Reference) - It doesntwork and broken up the cRIO connection.

Which is the right method to use?

TIA

Shree

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@dwisti