using fpga fifo

[Bipin]

Hi,

I want to use fifo for transferring data from acquisition loop to host communication loop. I want the four fifos each of 1024(I32) size. It seems that i have to use block memory while creating fifo. Do i need to use memory extension utility if I am using block memory fifo only for transferring data between two parrallel loops.

Best Regards,

Bipin

[preston_johnson]

You will want to use the FPGA Fifos found under the advanced/synchronization/fpga fifo palett structures. 

[Bipin]

Hi Johnson,

I know that i have to use FIFOs. My question was if I am using a FIFO of say 1024 Depth and Data type of I32 then I have to use Memory Type of block memory ( I got htis infromation from some old discussion as shown below.

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The limiting factor is the memory on the controller.  Here is information on lookup tables and flip flips in FIFOs...

Flip-Flops: Stores the data with standard flip-flops. This option stores the data using gates on the FPGA. Use this option for small FIFOs, up to 100 bytes.

Look-Up Table: Stores the data in a look-up table available on the FPGA. Use this option for FIFOs between 100 and 300 bytes in size.

Block Memory: Stores the data using embedded blocks of memory. Use this option for FIFOs larger than 300 bytes.

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If I have selected memory type as block memory do i have to use the memory extension utility ( Do I have to install the same), when i am not interested in writing or reading each element of the FIFO. I will write to FIFO till it is full and read all the elements till the FIFO is empty and transmitt to RT controller.

I am using crio 9002 with 9101 FPGA backplane and crio 9233(24 bit) module. By sampling rate is 15360 per channel i have 4 channel module. I will not be transmitting 15360 point at a time but 256 points per channel at a time hence the depth is 1024(256 x 4). I am using interrupt method for transmitting as i have some processing in RT also

Kindly infrom me if my procedure is correct if not suggest me the best method.

Best Regards,

Bipin

[Kristi_P]

The memory extension utility is not required for you to use the block memory option for the LabVIEW FPGA FIFOs.  It sounds like you are structuring your communication of data back to the host interface VI properly, as well.

If you have more questions, please post a reply.

Regards,

Kristi H
National Instruments