CRIO 9205 module aquisition time

[jpremor]

Hello,

I have one doubt about NI 9205 Analog/Digital converter module for CompactRIO. Its about the sequence of convertion and the time between two results. I have to aquire at minimum time betwen 2 channels, at example AI0 and AI3. When the FPGA start runing, the channels are comuted in order AI0, AI1, AI2...?? Or if i put in my code to convert only AI0 and AI3 it will convert only this channels? If yes, how long it takes? If no, i have to use channels AI0 and AI1 to take the minimum time because the convertion order?

Thanks and Best Regards

[Dustin_W]

Hello-

First, "What is the sequence of conversion for the 9205?"  When using the FPGA I/O Node with the 9205 there are two things you need to know.  1)Only the channels listed in the I/O node are converted.  2)The channels are converted in channel order regardless of the order listed in the I/O node.  For example in the following I/O node, channels would be converted in this order as quickly as possible: AI0, AI1, AI3, AI4 (note no AI2).

Second, "What is the time between conversions?"  The time between conversions is set by a property of the 9205 module.  If you right-click on the 9205 module in the project and select property, you will see a setting for 'Minimum Time Between Conversions'  By default this is set to 8us, however you can lower it to 4us.  Be aware that there are accuracy implications if you lower the time between conversions due to settling time of the analog to digital converter.  These implications are listed in the 9205 Operating Instructions.  Worst case, one channel is reading -10V, and the next is reading +10V.  In this case your reading may be off by as much 8 LSB or 2.4mV. 

If for some reason you must read channels in a specific order (i.e. AI0, AI3, AI1, AI2 ...) there is a more advanced way of using the 9205 - the IO Sample method.  See the 'NI 9205 Advanced IO' shipping example for help with that.  It essentially gives you full control of the analog to digital converter.

Hope this helps-

Dustin

Message Edited by Dustin W on 10-03-2006 12:47 PM

[jpremor]

Hello Daven,

Thanks, this could explain all my doubts about the sequence and the time. Setting it to 4us i already did, but converting AI0 then AI1 then AI2  i´ll have 8us between AI0 and AI2, right?

Again, Thanks a lot.

[Dustin_W]

I'm glad the explanation helped.  You are correct, if you read AI0, AI1, AI2, there would be 8us between AI0 and AI2.  Jut to make sure we are clear, you could read AI0, AI2, AI10, and there would be 4us between AI0 and AI2, and 8us between AI0 and AI10.

Dustin

[angelmcdoggie]

Hello All,

By any chance, is this kind of configuration available in cDAQ-9172 & Visual C++.  I plan to use an NI 9205 and might have the need

to access the ADCs.

Thanks,