PCI 5412 is cycling signal - trailing off periodically - is there a way to get it to stay continuous?

[RVallieu]

I am telling FGen 5412 to run On/Off segments – feeding that information from NI FGen Create Waveform – using WDT.

 

I am running in Arbitrary Sequence mode.

 

First I create the Square wave at 24,000 Hz in waveform format, building 2 segments, 1 high and one low.  Breaking each segment into array of 100.  There are marker segment on each high and low.  Marker on Index 76 of each segment routed to RTSI 2, which triggers the sample clock of S-DAQ PCI-6143.  The marker segments occur at a rate of 48,000 Hz since they are 2x a cycle (on, off). 

Loop counts for each segment is set to 1 – only want 1 on and 1 off in order.

The problem can be seen in the above picture - the FGen is cycling itself off and restarting.  This is creating real problems in my data.  I want the signal to just stay continuous Square wave with the markers to drive my DAQ.  Is there a way to have the Function Generator run continuous without these “shut-offs”?

The picture was

 taken using MAX to monitor the signal after I started the FGen with the VI that I created.  I am not restarting the FGen myslf.

 

Help would be GREATLY appreciated as this

 is a major hurdle in the project.

 

Thank you,

 

Ryan

Message Edited by RVallieu on 09-30-2005 10:33 AM

[Drew Creel]

I think you're experiencing some aliasing in your acquisition.  You are generating a 24kHz signal and acquiring it at 48kHz.  I don't think you can run the PCI-6143 off of an external sample clock through the MAX Test Panel, so the PCI-6143 and PCI-5412 are both running off of their internal oscillators, which drift with respect to each other over time.  So you end up sampling the square wave at a different point in the waveform each time, and that would explain the dip in your waveform acquisition.  You can rectify this by either running the PCI-6143 off of a sample clock generated by the PCI-5412 or by locking both devices to a common reference clock source. 

To prove that this is the problem, try sampling at a much higher rate, like 480kHz (change samples to read to 2000 as well).  The PCI-5412 should not be restarting or trailing off or anything once it has started generating.

----------------------------

Drew Creel

NI Software Engineer

Signal Generator Group

[RVallieu]

Ok I didn't know that the signal routing wouldn't hold in MAX - so this may not be my problem in my application...BUT

What prompted this post was that the 6143 is missing Marker signals and not acquiring a data point here and there - when I noticed what I posted in MAX I thought it might be my problem.  

I am routing the Marker segments over the RTSI2 line - the 6143 is then being set up with the DAQmx Timing (Sample Clock).vi - where I am telling it the source of the signal is the RTSI2 line.

I then start my FGen and my DAQmx read in parallel - but delay the FGen start by a few ms.  The DAQmx read has a timeout of 10 seconds as default so this shouldn't be a problem.  What I notice after that is that when the FGen starts and my data reads back is that sometimes it misses the first High marker.  I am telling it to read back 200 samples in this vi.  Then I will also notice about in the middle off the 200 points that a low reading is missing.

I wouldn't think that the S-Series card would have a problem reading at only 48kS/s.

Any idea on why this particular behavior might be occuring?

Thank you,

Ryan

[Drew Creel]

Well, the Marker signal coming from the PCI-5412 is a pulse, so routing that out will create a "clock" with an unknown duty cycle.  The marker might not be wide enough to properly clock the PCI-6143, which would explain why it appears to be missing samples here and there. 

Instead of trying to create a clock with a marker, you could try exporting the PCI-5412's divided down Sample Clock.  This means that if the PCI-5412 is programmed with a sample rate of 1MS/s, you can divide it by an integer number like 10 (giving you a 100kHz clock) and export that clock to one of the RTSI lines, where you can use it to clock the PCI-6143.  If you have NI-FGEN 2.3, there is an example called niFgen_DAQmx_Synchronization_Example.vi that explains how to do this.  (You can download NI-FGEN 2.3 from ni.com).

[RVallieu]

Interesting...Do you know what "width" of clock signal the 6143 needs?  The marker pulse is >150ns according to the manual.

I need to sample at those positions along the signal, where the markers are set.  Just dividing down the sample clock isn't going to assure the alignment of the sampling with the waveform, unless I am mistaken.

Ryan

[Drew Creel]

I do not know the duty cycle requirements for external sample clocks  for the PCI-6143.  Maybe it is listed somewhere in the documentation that came with the device?

You can divide up the signal such that the rising edge of the PCI-5412's divided-down exported sample clock occurs on the sample you want to acquire.  For example, when creating your sequence, make the first segment 24 samples high and 76 low, and make the second segment 24 samples low and 76 high.  Then the rising edge of the exported sample clock would occur on the 76th high/low sample in the square wave.

You could also try setting up a single-point acquisition and trigger the PCI-6143 off of the marker signal from the PCI-5412 to acquire one sample at a time.  I don't know if this will be fast or accurate enough though. 

[RVallieu]

I'll give that first suggestion a try.  I was originally steering clear of something like that for fear of settling times.

I have already tried to do the hardware timed singal point data acquisition with DAQmx and the PCI bus can't handle the speed.

I'll try it and report back on how it works.