VeriStand

cancel
Showing results for 
Search instead for 
Did you mean: 

Custom devices, timed loops and CPU cores assignment

Hi everybody,

 

i'm working on a RT PXI connected to an external controller (RMC-8354) provided with 8 CPU cores. For this project, i developed three custom devices which i added in the Veristand system explorer. In general i can say that all three custom devices contain a certain number of timed loops. What i would like to do is to assign specific cores to specific timed loops.

 

First questions are: considering that seems to me that the starting of the custom devices is managed automatically by the veristand engine, where should i put the code to set the OS and OT pools? Is it possible to set the pools dynamically during the execution (for example after the occurrance of a certain event) or this can be done only once?

 

Another question is: in general, in Veristand, is it possible to define the order of the starting of the custom devices?

 

Thanks,

 

aRCo

 

 

0 Kudos
Message 1 of 7
(6,865 Views)

Furthermore..

 

I'm having a problem with the installation of the SMP library in LV2011. Going in MAX, under the RT target, i uninstalled and installed again the NI RT Extensions for SMP module hoping that this could solve, but without success.

 

For instance, the library for LV85 is this one

 

Thanks for the help.

 

aRCo

0 Kudos
Message 2 of 7
(6,849 Views)

The SMP library is correctly installed. I discovered this creating a new RT project (just for example) and, in fact, when i edited the VI placed under the target section, i was able to find and put on the block diagram the SMP "Set OS pool.vi".

 

 

The fact is that a Veristand custom device project is managed in a different way. In particular it is not a RT project, but a simple set of libraries (precisely, Configuration and Engine libraries).

 

Do you have any idea on how to work around this problem and, finally, on how to use the SMP library VIs?

 

Thanks,

 

aRCo

 

 

0 Kudos
Message 3 of 7
(6,819 Views)

Add a pxi rt target to your project and develop your driver VI in that context to get the RT palette

Stephen B
0 Kudos
Message 4 of 7
(6,801 Views)

It's the good way. Is there a procedure written someware to realize the change of the project target type?

 

0 Kudos
Message 5 of 7
(6,788 Views)

No but you could look at some examples like this custom device's source. https://decibel.ni.com/content/docs/DOC-15748

Stephen B
0 Kudos
Message 6 of 7
(6,780 Views)

Thanks for the suggestion.

 

In the end, the initial question: in general, in Veristand, is it possible to define the starting order of the custom devices?

 

aRCo

 

0 Kudos
Message 7 of 7
(6,719 Views)