Re : Running dll-model and custom device NI VeriStand - Timing problems

[*andre*]

Hello,

I have a problem with a selfmade custom device in NI VeriStand. The custom device includes an FPGA-bitfile. The inputs are mapped to the outputs of a simulink model dll-file, witch is running in the model loop of VeriStand. The inputs of this model are generated via a Stimulus-profile-file, witch is generating an three phase voltage supply. 

The FPGA is used to generate a PWM sequence. This sequence is running with 16kHz. The simulink model in VeriStand is running with only 1600Hz. The maschine, operated by that PWM controlled supply, doesn't move and the current looks quite unlikely. So my opinion is, that the FPGA doesn't get enough or the wrong values to tricker the valves.

The mysterious  thing is, that when I disable the in- and outputs of the costum device, so that there is no communication between the model and the FPGA, the simulation runs in 16kHz two. By the way, both should run on a PXI-system. 

Does anyone have an idea. How can I connect the simulink model and the FPGA inputs without that decrease of frequenzy.

Thank's for help.

*andre* 

[Eric.M]

Hi andre,

I don't quite get it. What is the rate of your PCL, and of your custom device handling the communication with the FPGA ?

Either way, your FPGA should be generating PWMs all the time and should not be blocked by packets sent from the VeriStand engine, just having new commands being sent more sporadically from the VeriStand engine (1.6kHz while the FPGA runs 10x faster).

Having your custom device and FPGA code might be helpful if you need further help 😃

Regards,

[*andre*]

Hi  Eric,

I'm just trying to discripe it in another way. As you can see in picture "ProjectOverview.jpg" there are three simulations linked together via VeriStand simulation engine. One thing is a MatLab Simulink model packed to a dll-file and executed in VeriStand model simulation loop. Furthermore, there is a stimulus profile generating that mentioned three phase voltage supply. This is also the input for the Simulink model. As you can see, the two simulations are linked together via the Stimulus Profile Editor.

At last, there is that Custom Device. It's used to create an interface between the Simulink model running in the simulation loop and the FPGA-bitfile runing on a hardware FPGA. This two pieces of the hole simulation are linked together via the software mapping tool from VeriStand.

What I want to do is generating a three phase sinewave voltage to supply a asynchronous maschine, to test my selfmade PWM generator.

I think, that only the Stimulus-Sequence, which is generating the sinewave voltage, run on a PC. The other two models should run at a PXI system. Connection between my PC and the PXI is realized with Ethernet TCP/IP wire connection.

opservations:

• VeriStand gives the ability to check the actual loop rate of the simulation in the workspace. That variable shows a value of 1600Hz.The Custom Device has to be generated from a LabVIEW-Project. If I disable the FPGA-ports for writing values from simulation to the real FPGA, the actual loop rate of the simulation increases to 16kHz. But than, there are no more outpots possible from the FPGA.
• I checked the PWM signals at the output of the FPGA with a scope. The frequnecy is round about 16kHz. Thats what I want to generated.
• Signal curve of duty cycles and PWM output looks right.
• Asynchronous maschine doesn't rotate. The maschine and the frequency converter are fully operative.

My question is: How can I generate a VeriStand-Project and how can I connect the models without that decrease of the actual loop frequency. Because I thought, that the connection between  simulated model and real FPGA is to slow, isn't it?

There is another file with the LabVIEW-Project for the Custom Device.

Yours faithully

*andre*