08-31-2021 05:38 AM
Hello community,
I read on the Veristand page , that you can use VeriStand for Software in the Loop tests:
We're using Veristand with PXI hardware for HIL Tests. As our Software Devs are moving forward in running the Embedded Application on a Linux desktop computer, I'm curios whether we can start writing Veristand Tests even before we have hardware available using a SIL setup.
I have no clue what an interface between the Veristand Engine and a Software under test would look like in such an environment... can anyone give me some more information on this?
Regards,
Markus
Solved! Go to Solution.
09-01-2021 06:19 AM
Hi Markus,
Creating tests that scale from MIL to HIL takes a bit of planning, so it's a good thing you're doing it from the start!
The basic principle you need to follow is that you need to create stable interfaces for the different components of your system, the same way you would separate public and private members of a class if you were doing OOP.
In VeriStand, you can express this by creating aliases, which allow you to create logical names and groupings that are independent of the implementation. You can map these aliases to the relevant inputs and outputs.
For example, during MIL, your control model could have an input called "PedalPosition" that you map to a "PedalPositionIn" alias. You could then have another model that outputs that value and map it to the "PedalPositionGenerator" alias. Then you'd connect "PedalPositionGenerator" to "PedalPositionIn" in your mapping diagram. You could then write your test sequences through Stimulus Profile Editor, the C# API, or TestStand that stimulate your control model, all of these going exclusively through the public API that your aliases have defined.
As your application evolves into HIL, your control model would be replaced with the real DUT. Now the "PedalPositionGenerator" would probably be some kind of LVDT simulator that you read through FPGA. But since you've already designed your system with clear interfaces, all you need to do is change the mapping of the aliases. Since aliases can be exported and imported with just a few clicks, you can go from one setup to another very quickly.
Hopefully this gives you a good idea of how to get started with abstracting your system and creating public interfaces that scale throughout the development process.
09-08-2021 06:02 AM
Hi Marcelo,
let's see if I understood you correctly: We compile the software under test to be run as a model within the VeriStand Engine and the just use the Channel Mapping to connect the In/Out of the software under test to our plant model.
And to do so we use the VeriStand Model Framework to compile our C++ code as a compatible model.
Wow, that was quite an eye-opener! Thanks alot! Can't wait to have look at the Framework Documentation.
09-08-2021 06:13 AM
Hi Markus,
Yes you got the overall idea. The only comment I would make would be that if you have C++ code that you need to convert into a model, you should look into the FMI standard. VeriStand supports FMI natively, and adapting your model for FMI or MFW is about the same amount of effort, but with FMI being an open standard, there are a lot more resources available online. It also helps that you know VeriStand won't break compatibility as long as you follow the standard, so your model will have more longevity without needing changes.