Missing first falling edge on DAQmx SampleClock

[chrisger]

Hi there

i'm acquiring two ports on a PCI-6534 Board using external SampleClock on PFI3. The clock signal on PFI3 has a pattern like 0100 0100 0100....All works fine when i'm acquiring on the rising edge of PFI3 (8 Databits after 8 clocks), but when i switch to falling edge the first edge is not detected.

plz help...

thx in advance

i've atteched a simplified VI that shows this behaviour.

[chrisger]

did a little mistake: i'm using a PXI6534 instead of PCI6534.

[Marco_Brauner]

Hi Chris,

look at this to get an explanation of this behaviour.

http://digital.ni.com/public.nsf/websearch/2FB93421FAD8374286256BDF007A78AF?OpenDocument

best regards


Marco

[chrisger]

ah, ok.... that explains all.

didn't found that in the documentation.

best wishes and many thanks

chris