5622 resolution

[ajain]

Hello

I am working on a communications ATE and need a high speed digitizer to handle my incoming signals. I need a digitizer that has very high amplitude resolution (vertical). I have looked at the PXIe 5622 and this seems to fit my requirements quite well.

However, looking at the datasheet I am a little surprised as the specified performance varies from the rated performance. Anyone else has experienced the same? I tried to use a calculator from Analog Devices and found the effective resolution to be quite low. Can someone tell me what is the expected resolution with this board? Has someone used this board and tried to make effective bits resolution measurements?

Looking forward to a response.

Regards

Asish Jain

[Henrik_Volkers]

What's the problem with the spec?  NI anaouces XX Bit and YY Sample/S....

and in the spec you find AA Bit AT BB Sample/S  ... the spec is what you can claim. However the spec might not tell you wan't , sometimes because it's not specified, moslty because it's burried in other numbers/graphs you don't expect.

[Dan_K]

Hello Asish,

The PXIe-5622 is designed for communications applications, especially when paired with the PXIe-5601 and PXIe-5662, which makes up the PXIe-5663E.

If you had more information on the signal you want to digitize and what your exact requirements are I would be happy to see if the PXIe-5622 meets your needs.

As for the resolution of the device, it is important to note that this digitizer is designed for communications applications and therefore has a lower frequency limit of 3 MHz. If you need to digitize a signal with frequency components less than 3 MHz then you should look at another device.

In terms of accuracy the device has it's amplitude accuracy specified as a typically <±0.25 dB or ~2.9%.

Again if you could give me more information on your application I could be more specific regarding the suitability of the PXIe-5622 for your application.

[HSD]

The 5622 is optimized for frequency domain applications (like communications).  The frontend bandwidth is between 3 MHz - 250 MHz with a 150 MS/s ADC.  The resolution is 16 bits, but the effective number of bits will be based on your input signal:

ENOB = (SINAD - 1.76) / 6.02

SINAD is the ratio of the fundamental to sum of all the distortion and noise products.

I would refer to the single tone and two tone signal graphs in the specs of the 5622 to see the preformance of the frontend.

The 5622 also has a DDC (digital down converter) built into the firmware.  If your signal is of a narrower bandwidth, you can use the DDC to increase the ENOB of the acquisition.  The ENOB inprovement is proportional to the amount of decimation (as you decimate you reduce the bandwidth you can capture around the frequency of interest).  The additional bits gained is 10 log(decimation factor) / 6.02.  However, the total number of bits gained is limited to 16 bits because the DDC only operates with 16 data.  For instanace if you decimate by 10 (sample at 15 MS/s), your bandwidth would be limited to 6MHz (centered at whatever frequency you program); however, you would gain 1.66 bits of ENOB.

Keep in mind that various communication applications are suppectable to other factors:  Distortion, Phase Noise, and Linearity of the ADC.  For many applicatons these other factors are just as important as the ENOB.  The 5622 was designed with all these factors in mind.

Message Edited by HSD on 01-08-2010 06:25 PM