08-03-2009 06:59 AM
Hello,
I want to know the minimum achaivable sampling rate of the analyzer part of IF-RIO
the sampling rate is 100 MS/s and I guess that because DDC can decimate to (X/32768), then Decimation will reduce the final sampling rate to
100MS/s
__________= 3.052 KS/s
32768
Is that right?
08-09-2009 02:01 AM
Hello, any body help me, please.
08-09-2009 01:49 PM
Hi UASEF
Unfortunately, there isn't a clear answer here.
In terms of the decimation rates supported by the ni5640R driver, the maximum decimation is 4096. This will provide a 24.414 kHz IQ sample rate.
The module itself is supposed to be capable of more decimation. This requires modifying the ni5640R Host VIs and probably creating new filter coefficients to download to the ADC. Another method would be to low pass filter the IQ data on the FPGA to a lower bandwidth and decimate the data there.
J