Program par returned error code 31

[Rashid931]

Hi,

I am using NI PCI-5640R and NI PXI-5600 with Labview 2009. When I compile my FPGA VI, I get the following error message:

"PAR done!
ERROR:Xflow - Program par returned error code 31. Aborting flow execution... "

Kindly anyone guide me that what is this error and how I can remove this error?

Thanks in advance,

Rashid

[jareds]

Hi Rashid,

Would it be possible for you to post the compile log?  It may help to see the error in context.  Have you been able to compile this error successfully in the best before a change?  If so, what has changed since then? 

[Rashid931]

Hi Jared,

Thanks for the reply. Here is the Log Report:

Regards,

Rashid 

[jareds]

Hi Rashid,

Looking at the log, it looks like the real error occur further up in the compilation:

"ERROR:Place:665 - The design has 87 block-RAM components of which 32 block-RAM components require the adjacent multiplier site  to remain empty. This is because certain input pins of adjacent block-RAM and multiplier sites share routing resources. In addition, the design has 136 multiplier components. Therefore, the design would require a total of 168 multiplier sites on the device. The current device has only 136 multiplier sites."

It looks like you may be utilizing too many combined pieces of block RAM and multipliers.  It also looks like I mistyped my second question earlier.  Have you been able to compile this VI before without error?  If so, what has changed since then?

Message Edited by jareds on 06-15-2010 10:02 AM

[Rashid931]

Hi Jared,

The code for NI PXIe-5641R Real-Time Spectrum Analyzer demo is posted HERE  for LV 2009. Actually, I want to use the same code for NI PCI-5640R instead of NI PXIe-5641R. Since I am using a PCI-5640R with PXI-5600,  I added FPGA Target (PCI-5640R) instead of PXIe-5641R in Demo Code, and I replaced the 40 MHZ Onboard Clock of PXIe-5641R with RTSI_Ref_Clk by selecting the radial button to compile for single frequency  and specify to compile it for 40MHz or 80MHz. But when I re-compiled the FPGA VI after these changes in Demo Code, I got the following error:

"PAR done!
 ERROR:Xflow - Program par returned error code 31. Aborting flow execution... "

Kindly guide me How can I remove this error so that my FPGA VI can be compiled successfully?

Thanks and Regards,

Rashid

Message Edited by Rashid931 on 06-15-2010 10:51 PM

[jareds · Accepted solution]

Hi Rashid,

There are actually some pretty big differences between the FPGAs on the PXIe-5641R and the PCI-5640R.  The 5641R has 640 multipliers and 8784 kbits of block RAM, while the 5640R has only 136 multipliers and 2448 kbits of block RAM.  I believe the significantly smaller FPGA on the 5640R can't handle the FPGA VI without modification to the FPGA VI.  In order to get it to run compile on the 5640R, you would need to trim some of the math operations in the code that require multipliers.

[Rashid931]

Hi Jared,

Thanks for your kind reply. Can you suggest some modifications in the Demo Code.  I only want to detect the active frequency.

Regards,

Rashid

[Rashid931]

Hi Sir,

         Thanks a lot for your guidance. I have written a small Project for PCI-5640R and PXI-5600 . But unfortunately, I am unable to see the meaningful FFT.  I have attached my Project with this e-mail. Kindly guide me that what is the mistake in my code.

Thanks and Regards,

Rashid