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Reflection about the arithmatic performance of the VIRTEX-IIP30 FPGA on 5640R

Hi all,

Although I realized several signal acquisition and processing tasks using the 5640R board, I am still not sure about the actual arithmatic performance of the FPGA onboard.

My question is how fast on earth(maximum)can the 5640R process the recieved baseband data samples?

For example, I configured the AI clock as 25MHz, so the data points come in at  every 0.04us. If I perform certain DSP algorithm on the data, how fast can the FPGA handle(e.g. how many addition and multiplication operations per second can the FPGA achieve?)

Referring to Xilinx, I know there are  2 PowerPCs in the FPGA, but how does LabVIEW FPGA take use of them?

 

The reason I ask all of these questions is because I am trying to implement some real-time signal processing on the sampled data inside the FPGA, but not sure about its operation performance. Based on my past knowledge of 5640R, I know the AI clock before division is 200MHz, so the fastest clock speed I can use is 200MHz, but how many arithmatic operations can be done in one clock cycle?

 

Thanks very much!

 

Sunny 

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