Retry for bit file generation

[Ex-NISH2]

After the FPGA compile, LV saves the bit file.  For several times, I forgot to check out the bit file from SCC (perforce), and the compiler just exit directly.  If there could be a 'retry' option, much time can be saved.

[Mauricio Capistran-Garza]

If you hit the "run arrow" of the FPGA VI, instead of the right-click compile option in the project, it should do what you want.