01-15-2006 02:16 AM
Dear Scottie
1. EABO Timeout errors on host PC, probably resulting from the lack of EOI assertion:
We checked and captured the EOI on the scope while the failure occurred. The EOI was always asserted.
We found that the EOI’s magnitude of noise was around 1.5 V. The EOI jittering was happening a few ns after DAV was asserted. We filtered the noise and the read problem disappeared.
2. Missing first byte on transmission from PC to TNT. This is our major problem right now and we would like to eliminate it. Can this problem also occur due to a noise issue? If the answer is positive were exactly should we try to trace it.
Can you figure some other reason that may cause such a problem?01-15-2006 07:14 PM
01-16-2006 03:38 AM
I have sent you the plot with the EOI signal during a read failure to your Yahoo mail . The EOI line is the green one.
Do you have suggestions on how to debug the first character loss when the pc writes to our application (The write problem).
Can it be due to noise problems? If yes , where to try and monitor them?
Do you have any idea on some other reason to cause such a problem?
Thank you
01-16-2006 08:21 AM
01-16-2006 08:34 AM - edited 01-16-2006 08:34 AM
Message Edited by GPIB Guru on 01-16-2006 08:35 AM
01-17-2006 11:51 AM
Hi Scott,
Continuing our discussion from yesterday, we are trying to prove that we are losing the first byte as it arrives after we have a timeout (so we do not monitor the FIFO) and before we run the STOP command.
We do have some micro seconds there, which is enough for that to happen.
We are close to prove that this is the problem we have. More updates on that later.
However, while doign this debugging, we have encountered the following questions:
1. As our software is not written the way it should be done optimally, the PC can send us a byte at a time that we reach the STOP command:
TNT_Out(R_cmdr,F_STOP)
What happen in this case. The arriving byte and the STOP command are not synchronized and any timing between them is possible. Can we lose a byte in this way ?
2. We saw on the osciloscope that there is a time (arounf 5us) between the first bytes are entering the chip (NFRD, DAV, ... handshaing) and the asserting of the FIFO_NEF at ISR0. Is there a reason for this ?
Thanks, Eyal
01-17-2006 02:16 PM
01-18-2006 09:45 AM
01-18-2006 09:54 AM
01-19-2006 09:30 AM
Hi
We have implemented your latest recommendations.
The system runs continuously in the past several hours with no errors.
We are very optimistic and feel the troubles are behind us.
Thank you very much for the continuous professional support.
We would not have done it without you.
Thank you all again