Hello,
I simulate small FPGA code parts from time to time, and use these while doing it.
There are 2 helpers.
1) Simulation time estimate and progress: Module_SimulationProgress_Caller + Module_SimulationProgress_Popup
Here the idea is to just add the caller VI and it will call and display progress.
It has some "autotune" funtion to not call popup to often, but still update once in a while. It tries to hit around 0.5-1.5 sec in update.
This will minimize time spend on popup after some iterations. It also makes it possible to stop the main sim VI.
The estimator only works if your code is fairly static.
2) Data collector while running: Module_FGV_DataCapture.vi
Here the idea is to collect data (in fast buffer) while simulating and use it to display while simulating.
It has 5 buffers that can have different number of elements in them, but all have same length.
Then in a "slow" loop I update graphs once every second, then i can abort if i see something wrong.
This is to avoid having graph plotting in highspeed loop or using graph after simulation is run.
3?) Maybe i will add a plot VI that can take data in from the buffer, just to clean up simulation VI, and make it generic.
Can i get some feedback if it is good or not? Any other sugestions are wellcome!
Or how you do your small FPGA simulations?
Thanks.
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