The "width" question is back again.
Here's today's Slashdot summary:
Inside AMD's Phenom Architecture
...The architecture supports wider floating-point units, can fully retire three long instructions per cycle, and has virtual machine optimizations...
Here's the InfoWorld article:
Inside AMD's Phenom And Opteron Quad-Core Architectures
...Earlier processors had 64-bit floating-point execution units. Because of 10h, AMD will be able to equip Phenom and Barcelona with 128-bit floating-point units, if it so chooses. The wider design will double the performance of floating-point vector operations...