Bug with FPGA Memory Items

[Gryffin]

Hello,

I have LabVIEW 2025 Q1 and in a project with multiple CRIOs, many of the memory items in my project for multiple targets have been deleted or are corrupted:

I have always been plagued with issues regarding the memory items, however, it seems that a recent update or change has really broken things.

Any ideas what happened or how to fix?

Many thanks

[Gryffin]

Seemingly related to this issue....https://knowledge.ni.com/KnowledgeArticleDetails?id=kA03q000000xBFtCAM&l=en-US

Any suggestions on how to overcome? Or even just to restore my memory items?

[Newton_Petersen]

Can you attach the original .lvproj file (presumably saved in some previous version of LV before 2025Q1 where the items are not broken)? Basically fishing for how we can reproduce the corruption process and debug...

[Gryffin]

I'd rather not post the .lvproj, as it is a large project and I'd prefer not to give away its structure.

All memory items which had a fixed-point value type have been affected; memory items with non-FXP data types are fine (except that many registers disappeared).

Is there a way to programmatically generate these memory items so that I can avoid the buggy LabVIEW project interface?

[Intaris · Accepted solution]

I never create BRAM in the project. I always use the tools to instantiate directly on the block diagram. The following is from a Flex-RIO target, but I would assume the same is available for your target..

You should have the ability to drop a "create BRAM" on the block diagram where you can open the configuration dialog to set up everything you need.

The best advantage is portability, the source code is self-contained. If you need a second copy, just copy the VI on the BD and you're already ready to go. In VHDL, the BRAMs get named based on their full hierarchical path, so they will still be uniquely named internally.

As you can see above, the same ability should exist for Registers, handshakes, FIFOs and Block RAM. The only thing I would like which is NOT supported is DMA FIFOs (To or from target). They must be project items.

[Gryffin]

Hello Intaris,

Indeed, that is what I've resorted to (the many wires of the Registers, BRAMs, and FIFOs make me sad...).

It seems that the only choice for the Host-To-Target and Target-To-Host FIFOs which have fixed-point type and were corrupted is to delete and remake them whenever they get corrupted.

Quite annoying!