Cannot read data in FPGA

[.aCe. · Accepted solution]

Try the 8.5 version.

[RedAG]

I still couldnt make your program to work, it was showing "Error -61017" in the "error out". So, I modified the original program to the one you edited and send over. Now, I get "1" in the "Data" out indicator in the HOST VI. But, this this only possible when I turn off the Emulator.

The problem is, I havn't connected any external signal to the PXI-7813R for it to actually display the data as 1. 

DO you know why this is happening?

I am trying to read in a digital signal through the PXi-7813R backplane. I have an SCB-68 connector for physically connecting the external signals.

I have attached the modification I made along.

[nathand]

Many digital inputs float high when they're not connected, so it's likely that nothing is wrong.

Do you understand why your original program did not work? Most LabVIEW functions will do nothing when there there is an error on the error input. In your case, you had an error coming out of the FIFO Read. That error went into the Read/Write Control. Because there was an error on the input, Read/Write Control did nothing - it did not set the value of the Read control. Since the initial state of Read was false, it stayed false, and the FPGA never put any data in the FIFO, which caused the same timeout error again.

[RedAG]

Uhmmmm, thanks nathand. Never thought it that deep, but that is a very simple but effective explanation. Ofcourse, I will need to find out why that error came out of the read in the first place now.

However, once I modified the program, it is now taking in a digital signal. When ever I connect a 5V in to my connector, the indicator in the FPGA VI goes high; but its not without issues unfortunately. There is still an error in my HOST VI. The HOST VI returns the error    "Open FPGA VI referenece in nirviIntFOpen_PXI-7813R.vi->Host.vi<append><b>FPGA activities:</b>  Emulation of an FPGA vi", that is Err -61141.

The Host Vi does not run either. I have attached the latest modified program.

[RedAG]

Correction, the HOST VI runs once I have stopped running the FPGA VI, but not simultaneously, which is strange

[nathand]

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@The_Sugarman wrote:

Uhmmmm, thanks nathand. Never thought it that deep, but that is a very simple but effective explanation. Ofcourse, I will need to find out why that error came out of the read in the first place now.

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No, no you don't! You KNOW where the error came from! That's what I'm trying to tell you! (sorry for the exasperation)

The error occurs because the read times out before it gets enough data from the FIFO. There is no data in the FIFO because Read is set to false (the default value when you start the FPGA, since you didn't change the default value to true). Because of the timeout error, the Read/Write Control doesn't execute, so even if you set the Read value to true on the Host it never gets set on the FPGA, so there's never any data in the FIFO, the error occurs again, the Read/Write Control doesn't execute again, and on and on until you stop the program. I hope this is clear.

As for the other problem you've described, I'm making a guess at what you're doing. DON'T start the FPGA VI manually. That happens automatically when you start the Host (note the checkbox that says "Run the FPGA VI" in the Configure Open FPGA VI Reference dialog box, might be labeled differently in your version of LabVIEW). When you start the FPGA VI manually, you get the busy error (-61141) when you start the Host because the FPGA VI is already running and can't be started again. Depending on the way the emulator works in your version of LabVIEW, you may not see the FPGA VI running, in which case you might be able to click the Run arrow AFTER starting the Host to have it connect to the already-running instance in the emulator.

[RedAG]

Ohhh OK! Got it. So, if I actually run the FPGA VI first, the default value of READ will be set to FALSE, which means that I will end up with an error?

In your last paragraph, you mention that the HOST VI has to be run first, which will automatuically "call" the FPGA VI through the FPGA refernce. When I do this, the HOST VI runs fine, but I have to manually run the FPGA VI after the HOST as the dialog box in the HOST VI for the FPGA is already confugured. But the problem is, when I do this, and when I run the FPGA, it shows an error saying how the FPGA is busy and to close all the application before running the FPGA!!!

[RedAG]

Tried something, and its fine now. I set the Emulator off for the project. Then, there are no errors. I run the HOSt first and then the FPGA like you said and no problems. Its reading in data without any errors. 

Thanks again!