Cascade counters on DAQCard 700

[rbaerg]

I am trying to cascade counters on a DAQCard 700 (8253/54) so I can count events beyond the capacity of one 16-bit counter. I am trying to use the output of counter #2 as the clock input of counter #1, in effect constructing a 32 bit counter. I am using the ICTR Control.vi in LabVIEW 5.1, which is used to control the 8253/54.

I believe my difficulty must be in the setup mode I am choosing. I have been using the control code 4 for counter #2. According to the LabVIEW documentation, in setup mode 4, the output is initially high. While the gate input is high, the counter counts down. When 0 is reached, the output becomes low for one clock pulse, and then goes high again. That should provide a pulse to counter #1 which should then inc
rement each time 0 is reached on counter #2. I do not seem to be getting the output pulse as expected when 0 is reached on the counter #2.

Any comments are appreciated.

[JustinBritten]

Please reference the Event Counting example for 8253 based devices that ships with LabVIEW. From LabVIEW 5.1 you will find it at:

Find Examples -> Data Acquisition -> Counters -> Event Counting -> Event Counting (for 8253 based devices). In newer versions of LabVIEW you can search for the key word "event".

This example does event counting on one counter using the setup mode 0. If you bring up the full LabVIEW help for the ICTR Control VI you will see that when using setup mode 0 the output becomes low after the mode set operation, and the counter begins to count down while the gate input is high. The output becomes high when counter reaches the TC (that is, when the counter decreases to 0) and stays high until you set the selected counter to a
different mode.

Connect the output of counter 0 to the gate of counter 1. What this means is that when you setup counter 0, the output will be low (meaning the gate of counter 1 will be low, thus not counting). Counter 0 will count from 65535 down to 0 and then the output will go high (not just a pulse high, but a continuous high). This means that the gate of counter 1 will now be a steady high and will start counting.

I have attached a small .gif image below of what ICTR Setup Mode 0 will look like.

Regards,
Justin Britten

Applications Engineer
National Instruments

[rbaerg]

If I understand you correctly, that set up has the first counter count down from 65535 to 0, after which the second counter counts down from 65535 to 0, in effect creating a single 17-bit counter.

I have been able to get my system to operate with the first counter in mode 3, however, as you are aware, in that mode the output sends out a single pulse on every other TC. The first counter is then going from 65535 to 0 twice, for every increment of the second counter. I need to pulse the output on the first TC.

Randy

[JustinBritten]

Randy,

Check out the example program I have noted below. It will work with LabVIEW 5.0.1 up to version 6.1.

DAQ-STC and TIO: Creating a 48-bit Counter or 64-bit Counter by Cascading Two DAQ-STC Counters or TIO Counters with the New Counter API VIs
http://eagle.ni.com/stage/we/niepd_web_display.DISPLAY_EPD4?p_guid=B45EACE3E6F756A4E034080020E74861&p_node=DZ52327&p_submitted=N&p_rank=&p_answer=&p_source=Internal

Also, try searching in the NI Developer Zone, at www.ni.com/devzone. Use keywords such as cascade and counter.

Regards,
Justin Britten

Applications Engineer
National Instruments