Hi Everyone,
I am using a PCIe6323 and a PCIe6612 to generate timing pulses for an experiment. We read a master clock signal into the program and use it to trigger the generation of several digital pulses. We use the DAQmx Create Channel function to generate each new task. We pass a value for pulse duration to the "high time" and "low time" inputs and a different value for the delay from trigger edge to the "initial delay input." We want our pulse generation to be retriggerable: whenever a new trigger edge is detected, the program should generate a new pulse with the appropriate delay and duration. The code inside the upper case structure is working properly - it generates a retriggerable pulse on PFI10 with the appropriate duration and delay from the clock edge.
I would like to reconfigure one channel (PFI8) to output a two-pulse train with user controllable delay from the clock edge. I attempted to do this in the lower case structure. When I run the program, it works properly for one cycle of the clock signal. After that, the program generates two pulses of the appropriate high and low durations, but with zero delay from the rising edge of the clock. If I set the Start.Retriggerable property node from "T" to "F," then the program will execute correctly for one cycle of the clock, and then output nothing on PFI8, as expected.
Therefore, it seems that my program is working correctly for one cycle, but there is an error in the retriggering function. When my two pulse train retriggers after the first instance, it no longer has the correct delay from the clock edge.
Any help would be appreciated.
Thanks in advance!
Aaron
