FPGA VI reference issue

[Slev1n]

Ok. It took me hours to understand how you realized your example

You first created a dynamic reference control and than created a type def out of it. I always created the dynamic reference control, than switched the "Open FPGA VI ref..." function to type def'd and than created the type def'd reference control. If you do it my way, it is never possible to connect both of them, but with your approach it is easy...just in case someone stucks at the same point 🙂

I will now adapt my subVI references and then give feedback. If it doesnt work, I am going to make/copy new I2C subVIs 🙂

although I think this is not the intended purpose 😄

until later...

Slev1n

[dan_u]

I'm not sure I understand how you created the typedef, but maybe your typedef was not of dynamic FPGA interface type.

Okay, good luck 

[Slev1n]

First of all, it works!

I can run my VI now without issues. And I think there is less effort now, if new bitfiles have minor changes compared to previous ones, to get the VI running again.

TO understand my previous irritation. There are three kinds of FPGA VI references:

- Dynamic

- Dynamic Type Def (Create a type definition out of a common dynamic FPGA VI reference control/indicator)

- Type Def

I always used the third type, and so was never able to connect it to the first type 🙂

Thank you for your help and patience.

Kind regards

Slev1n

[MyrzaMBM]

le ‎08-02-2018 05:29 AM

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Hello
I'm working on a project based on the example getting started 5783.

My problem is that when I compile by referring to the bitfile, the project works perfectly, but when I refer to the VI without changing anything, I have an error in the stream on the AO loop.

I tried to do some modifications in the FPGA VI and compile to have a new bitfile, the project don't work by refering the new bitfile.

It only works by referring the bitfile by default ! 

what can be the problem ! 

thanks

[MyrzaMBM]

Hello
I'm working on a project based on the example getting started 5783.

My problem is that when I compile by referring to the bitfile, the project works perfectly, but when I refer to the VI without changing anything, I have an error in the stream on the AO loop.

I tried to do some modifications in the FPGA VI and compile to have a new bitfile, the project don't work by refering the new bitfile.

It only works by referring the bitfile by default ! 

what can be the problem ! 

thanks

[RavensFan]

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