FPGA analog input rate

[shuishen1983]

---

@nathand wrote:

The FPGA period determines how fast you are sampling the analog input.  Each iteration of the FPGA loop it will put a single sample per channel into the FIFO.  On the host, you need to read enough points to keep up with the FPGA rate; otherwise, the FIFO will fill and you'll lose data.  In order to get 10,000 points per second you need to run your FPGA at 100us.  On the host, you might run a 200ms loop and read 8000 points each time (4 channels x 2000 samples).

You can set a different size for the FIFO on the FPGA and on the host.  On the FPGA you don't need a large FIFO (I'd leave it at about 500 elements unless you're really short on space).  On the host, you want the FIFO depth to be sufficient to hold several cycles of data - say 40000 points for one second worth of data - in case something interrups the loop momentarily.  You configure the FIFO depth on the host using an FPGA Invoke node (see the LabVIEW help).

---

I guess the sampling rate is 1 data point per FPGA period (100us). Does that mean the interval between two of the consecutive points of the 200 points is 100us or the interval between the first and the last is 100 us? How do I plot the real time on the x axis now? Now I have zero to 2000 on the x axis, I think those 2000 points

[nathand]

---

@shuishen1983 wrote:

I guess the sampling rate is 1 data point per FPGA period (100us). Does that mean the interval between two of the consecutive points of the 200 points is 100us or the interval between the first and the last is 100 us? How do I plot the real time on the x axis now? Now I have zero to 2000 on the x axis, I think those 2000 points

---

Every 100us the FPGA adds another data point to the FIFO (First In, First Out queue), so the difference in time between two consecutive points is 100us.

When the format is set to relative time the base unit for the X scale is seconds, so you would set the X multiplier to .0001 to match real time.

[shuishen1983]

Many thanks to you! You are so patient.

[shuishen1983]

I understand how the 1 d signal is decimated into four chanels. But the FPGA card knows how to put the elements in the 1 D array, right? How can I splid the data going to the Waveform Grapha? I have tried unbundle split, and decimate array. None of them works. So what block should I use?

[nathand]

Try using "Reshape Array" with the first dimension set to the number of samples per channel and the second dimension set to the number of channels.  Set "Transpose Array" (if it's not already set) by right-clicking on the graph on the front panel.

[shuishen1983]

I tried reshape, but it can't do the job. Is there something the reverse of the build array in Labview?

[shuishen1983]

I think I will try array subset.

[nathand]

---

@shuishen1983 wrote:

I tried reshape, but it can't do the job. Is there something the reverse of the build array in Labview?

---

The reverse of Build Array is Index Array, but try it the way I suggested, without all the extra array manipulation.  I've modified your VI slightly to show it working.  Also, you should change your FIFO data type to I16 to match the data that you're reading from the analog inputs.

[shuishen1983]

Thank you, index array works. When I need to filter the data I get, I am trying to put a express low-pass filter before the waveform graph. I setup the cut off frequency to 400 Hz, but error comes out that the f_low<f_high<f_s/2 should be fulfilled. When I setup the FPGA period I am using 200 usec. So the sampling rate should be 5000Hz right？ So why do I have the warning about f_s/2?

[nathand]

It's a bad idea to mix Express VIs with other VIs, because the Express VIs work with "Dynamic Data" and most other LabVIEW functions deal with standard data types.  When you feed your data to the filter, LabVIEW inserts a "Convert to Dynamic Data" node that converts your array to a waveform with no timing information.  As far as I can tell (I never use Express VIs), the lack of timing information in the waveform causes the error.  The best solution is to avoid Express VIs and use a standard filter, but you could also try inserting a "Build Waveform" node instead.  Wire your data into the Y array and the correct timing information into dt, then connect the waveform to the filter.  You might need to generate an array of waveforms, one for each of your channels.