FPGA custom trigger for PCIe 5763

[JayLizd]

I want to be able to acquire a set amount of samples every time I receive a trigger. I want this implemented on the FPGA level since this would be the fast process time for that trigger. I am open to any suggestions.

Hardware: FlexRIO PCIe 5763

[Terry_ALE]

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@JayLizd wrote:

I want to be able to acquire a set amount of samples every time I receive a trigger. I want this implemented on the FPGA level since this would be the fast process time for that trigger. I am open to any suggestions.

Hardware: FlexRIO PCIe 5763

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The shipping example has an FPGA based analog trigger.  It is gated by the Streaming API.  This API can only be reset by the host which can be limiting if you want to reset/rearm the trigger in hardware which is what I assume you need.  That is one thing that would need to be changed in the FPGA (basically the removal of the streaming functions in the FPGA and then of course on the host side of things).

There are a few things to confirm and review but may not affect this discussion.  This includes the analog trigger, do you need triggering per channel, will there be many cards involved (so TClk may come into play).  A high level consideration is the maximum resulting throughput that you expect.  This tells us how much you need to review the host streaming to disk side of things.

Another thing is the amount of samples to capture per trigger.  The 5763 has DRAM and the example uses the DRAM as a large FIFO to 'catch' data coming in at a high rate.  Maximum number of trigger events per second and samples per trigger are important factors.

The 517x cards use the Multi-record Acquisition functions on the FPGA and they show how you they are used.  This can be tricky because the functions may be more than what you need or less.  I say this because the effort to use it is non-trivial so it is important to decide if this is a route to take.  The 517x examples can be seen by installing the Reconfigurable Scope driver code.  You do not need the hardware to view the examples.  You do not need additional licenses either.

[JayLizd]

Thank you for the response. The type of trigger I have is analog and I am only working with one card. I want to acquire around ~ 3000 to 8000 samples per trigger received via one analog channel. After the trigger is received two analog channels will collect my desired amount of samples and then wait for the next trigger to collect the samples again. I am not sure what throughput I need to the host but currently I get enough data that I don't lose any when ever I trigger of the first trigger. I have implanted a weird work around on the host side to acquire a desired amount of samples and then reset. I set my acquisition to finite and the set the amount of samples I will then set the trigger using the FlexRio api. Once all of this is set inside a for loop or while loop I use the start FlexRio Start Stream API VI and the read stream VI. The issue with this is that every so often my signal and trigger will desync and I will start to see my waveform shift to the left. So I want to make sure that FPGA is the one making sure the trigger and signal align every time. If the purposed solution is to the remove the Streaming API that would not seem too difficult; however, I would not know how to allow only a set amount samples to be to sent to the host with each received trigger. Please let me know if you any other questions.

[JayLizd]

This is an image of my work around

[Terry_ALE]

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@JayLizd wrote:

Thank you for the response. The type of trigger I have is analog and I am only working with one card. I want to acquire around ~ 3000 to 8000 samples per trigger received via one analog channel. After the trigger is received two analog channels will collect my desired amount of samples and then wait for the next trigger to collect the samples again. I am not sure what throughput I need to the host but currently I get enough data that I don't lose any when ever I trigger of the first trigger. I have implanted a weird work around on the host side to acquire a desired amount of samples and then reset. I set my acquisition to finite and the set the amount of samples I will then set the trigger using the FlexRio api. Once all of this is set inside a for loop or while loop I use the start FlexRio Start Stream API VI and the read stream VI. The issue with this is that every so often my signal and trigger will desync and I will start to see my waveform shift to the left. So I want to make sure that FPGA is the one making sure the trigger and signal align every time. If the purposed solution is to the remove the Streaming API that would not seem too difficult; however, I would not know how to allow only a set amount samples to be to sent to the host with each received trigger. Please let me know if you any other questions.

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1. What is the maximum time for your acquisition? (without gaps between triggers)
2. What is the maximum number of triggers you expect in that time period?

[JayLizd]

The max time of a single signal wave is 200 ms and in those 200 ms i receive 476 triggers. Every time I receive a trigger I want to capture ~5000 samples. All this is for a single wave of data. Every 200 ms I receive a new signal waveform.

I want this acquisition to be repeatably multiple times. 

[JayLizd]

I took the shipped example and removed the streaming api components but left the sample counter but know my fifo times out when I read it from the host side. Is there any way to use the default personality and gather a set amount of samples after a trigger? It can do it once with finite but I have to restart the stream on the host which can cause a desync with my signal and trigger. How can I make the stream reset after a set amount of samples are collected via the FPGA? 

[Terry_ALE]

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@JayLizd wrote:

I took the shipped example and removed the streaming api components but left the sample counter but know my fifo times out when I read it from the host side. Is there any way to use the default personality and gather a set amount of samples after a trigger? It can do it once with finite but I have to restart the stream on the host which can cause a desync with my signal and trigger. How can I make the stream reset after a set amount of samples are collected via the FPGA? 

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Host code will need to change.  Especially the parts which work with the Streaming API.

[JayLizd]

maybe a better question would be, how can I restart the finite stream through the FPGA side instead of calling the start stream vi on the host side? I would like the stream to auto restart after a finite stream is done. I have been struggling editing the FPGA side of the FlexRIO 

[Terry_ALE · Accepted solution]

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@JayLizd wrote:

maybe a better question would be, how can I restart the finite stream through the FPGA side instead of calling the start stream vi on the host side? I would like the stream to auto restart after a finite stream is done. I have been struggling editing the FPGA side of the FlexRIO 

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The streaming functions are 'open source' and you can dig in there to see if you can control their state from the FPGA.  My attempts have been futile.  It has cool functionalities but some of my projects deviate too much from the core abilities where it is easier to make my own than modify it to work for the project needs.

When I have built something like this I make my own streaming/control functions.  It is a state machine which, roughly, is: a) unarmed, b) armed, c) triggered and data flows d) stops flowing and goes back to being armed.  Sometimes they want a finite count of triggers so we stop then or the number of triggers are infinite.