FlexRIO 6581 Timing violation need help

[Marc-Henri]

Hi all,

I need some help, in the enclosure code, I have timing violation when I compile it. Does somebody can take a look, to help me to optimize or change something in order to compile the code ?

Thanks. Marc

[dan_u · Accepted solution]

Where do you get the timing violation?

From a quick look, try replacing the x2 (multiply with a constant of 2) in Write DIO.vi with a bit shift of 1 bit.

Also, do all the values have to be U32? Always use the smallest representation possible. You can even change the representation of the tick counter.

[Marc-Henri]

Hi,

I have a timing violation in the big SCTL in the middle with the state machine Idle/ReadRam/Generate. You're right about the U32, I don't realy need them.

Any other suggestion ?

Regards Marc.

[dan_u]

More important than the U32 is the multiply I mentioned.

[Marc-Henri]

Thanks to you dan_u