LabVIEW
Gapping with even small changes to Duty Cycle on PWM Loop
In my FPGA, I have a loop that will wait forever to get the high/low ticks form Labview realtime, it then writes them to the register for the PWM Loop. The PWM loop (currently at 522 ticks a loop) reads these registers and uses the logic from the first picture to determine if the DO should be on or off. However I am experiencing significant gaping when I increase my duty cycle. For example increasing from 10.2 to 10.3 duty cycle @ 800 Hz shows a pump on screen when measuring the PWM on a scope. However, from 10.3 to 11.2 I see no change! But then another visible change on scope when going from 11.2 to 11.3 on the Duty Cycle. Is 522 ticks too slow for my PWM Loop using this logic? Alot of the wires on my main image are from controls that I have removed in attempt to make the loop faster. The Real time Loop is correct. What is really odd is that the gaps are not as noticeable at lower frequencies. for example, at 200Hz my ramp is smooth, but at 800 Hz it is visibly present in even my pressure gauges (I am controlling a solenoid).
It is interesting that the example code subVIs use Saturation and single iteration timed while loops. Is this a better method than using feeback nodes and the Max/Min Functions?
Update: Running the output status method significantly slows down my loop rate-->Thus the source of my low PWM resolution. Should this method be entirely avoided?
