Issue porting from sbRIO 9609 to FlexRIO 7939 (compiling hangs forever after "Finished Cross Boundary and Area Optimization")

[jiangliang]

Hi All:

I have to port some FPGA code from sbRIO 9609 FPGA to FlexRIO 7939, I have successively verified my code on 9609, but when I have the same code running on FlexRIO 7939, the code simply stops compiling after showing "Finish Cross Boundary and Aera Optimization".

The CPU is busy running vivado.exe in the background but after 3 hours, the output of Compilation Status stays the same.

(normally it only takes about 20 mins in sbRIO 9609, also, I did not append CLIP in FlexRIO, only the core function is used when I try to identify the problem, I even set the input to a constant, this problem is the same.)

The partial function of my subVI, which checks out in 9609.

BTW, I can successively compile a blank VI in FlexRIO 7935 or even some simple built-in function. But not the function I tested in 9609.

p.s. I have also tried to replace DSP48e1s to Adder functions, every thing stay the same, still hanging at the same place.

Here are the last lines of the Xilinx Log.

----------------------------------------------------------------------------------------------------------------------------------------------

INFO: [Common 17-14] Message 'Synth 8-3917' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.
---------------------------------------------------------------------------------
Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:01:46 ; elapsed = 00:01:58 . Memory (MB): peak = 1612.684 ; gain = 1029.586
---------------------------------------------------------------------------------

Report RTL Partitions:
+------+-------------------------------------------------------+------------+----------+
| |RTL Partition |Replication |Instances |
+------+-------------------------------------------------------+------------+----------+
|1 |Test_DSP48e_Encoder_32element_32vs1_min_gap32_vi__GB0 | 1| 22186|
|2 |Test_DSP48e_Encoder_32element_32vs1_min_gap32_vi__GB1 | 1| 18976|
|3 |Test_DSP48e_Encoder_32element_32vs1_min_gap32_vi__GB2 | 1| 11820|
|4 |Test_DSP48e_Encoder_32element_32vs1_min_gap32_vi__GB3 | 1| 17964|
|5 |Test_DSP48e_Encoder_32element_32vs1_min_gap32_vi__GB4 | 1| 20028|
|6 |Test_DSP48e_Encoder_32element_32vs1_min_gap32_vi__GB5 | 1| 23916|
|7 |Test_DSP48e_Encoder_32element_32vs1_min_gap32_vi__GB6 | 1| 26506|
|8 |Test_DSP48e_Encoder_32element_32vs1_min_gap32_vi__GB7 | 1| 9940|
|9 |Test_DSP48e_Encoder_32element_32vs1_min_gap32_vi__GB8 | 1| 10228|
|10 |Test_DSP48e_Encoder_32element_32vs1_min_gap32_vi__GB9 | 1| 28240|
|11 |Test_DSP48e_Encoder_32element_32vs1_min_gap32_vi__GB10 | 1| 21076|
|12 |NiFpgaAG_00000001_TimedLoopDiagram__GC0 | 1| 337|
|13 |NiFpgaAG_testFPGAComp__GC0 | 1| 2217|
|14 |TheWindow__GC0 | 1| 2|
|15 |SmallBlockTop__GC0 | 1| 1316|
+------+-------------------------------------------------------+------------+----------+
---------------------------------------------------------------------------------

[Mr.Genius]

Hello,

You should check this link Stuck in Start Cross Boundary Optimization in VIVADO. I guess a similar issue described there.

Also, what is the installed driver's version? Perhaps we should check the compatibility at first.

Do you rebuild the same code in FlexRIO or you use another method to import the code?

I see there's a broken wire in the attached code's picture. This is the block diagram of the sbRIO code, right?

And just additional information about that INFO message: In Vivado there is a limit for the number of warnings and errors which are displayed by the tool for a particular error or warning; the default value of this limit is 100.