LabVIEW FPGA - Code Execution Speed

[LucianM]

Hi,

Can someone explain why the For Loop in the snippet below takes 50 ticks to complete? Input array has 12 elements. I would expect less than 40 ticks:

The thing is that I need the whole loop to take less than 40 ticks so I can acquire with a rate of 1GS/s. I have not tried to increase the FPGA clock rate yet.

LabVIEW 2018, 3xNI-9223, cRIO-9045

[LennartM]

In the screenshot it says 4 samples takes 16 ticks. So that is 4 ticks per sample. Then you are already  need 48 ticks to process 12 right. And you wire 14 channels to it. So 50 sounds reasonable. You also do not initialise your shift register.

[LucianM]

Please ignore the comment inside case structure. This was valid before I used the SCTL.

What shift register are you referring to?

[crossrulz · Accepted solution]

Well, the FOR loop itself will be around 4 ticks per iteration (index the value, SSTL, check stop condition, iterate counter).  Then you have the entering of the FOR loop and then entering the Sequence Structure to get the final time.  So I am getting 4*12 + 2 = 50!

I would get rid of the FOR loop and just do an Index Array and the stop logic (i >= 11) inside of the SSTL.

[LucianM]

So the For Loop is taking 2 ticks (as mentioned in LabVIEW help), one for the SCTL and one for indexing the value. I wasn't aware that indexing is also using one tick and I expected 3 ticks per iteration.

I tried you idea to get rid of the For Loop and now it takes 14 ticks:). 

Thanks again crossrulz!