Open FPGA reference fails to execute

[jordankuehn]

Hello,

I apologize if this is covered elsewhere; I could not find anything relevant.

I have a fair sized RT application that calls the Open FPGA Reference vi as the second item in the initialization.  The FPGA is compiled and has run fine before with a simpler RT application.  When running the program I probe the error wires as well as highlight execution and the program is simply stuck on that vi.

The vi is configured to point to the FPGA vi in the project.  I have tried pointing to the bitfile and the same behaviour occurs.

The RT Target is an sbRIO 9631 with NI-RIO 3.5.1 installed (no scan interface).  I have reinstalled it during my troubleshooting.

So with that, any suggestions?  If not, I may be on the phone with NI tomorrow and will post anything I learn.

[smithd]

Hi Jordan,

From your description, it sounds like the realtime VI is the problem. I would recommend changing some of the settings on the open fpga ref vi, such as Dynamic Mode, and checking/unchecking the Run FPGA VI box. Since you said a smaller RT VI does not have the same issue, try using the conditional disable structure to disable some sections of code until you find out what part of the code is causing the issue. Either way, it sounds like you're on the right track.

Thanks,

D Smith

[smithd · Accepted solution]

In the same vein, it might be possible that the UI is simply not being updated because you are using too many resources on the RT controller. Especially with probes and highlight execution running, the networking processing could be causing an issue. In measurement and automation explorer or the distributed system manager, you can view the sbRIO memory/processor usage here:

http://digital.ni.com/public.nsf/allkb/8C7B655978C8ADFB86256AAE004AD261?OpenDocument

I would also try flashing the sbRIO and reinstalling the 3.5.1 drivers on the device, and trying again. If you had a different version on the target like 3.5, there may have been a bug fix which solves this.

Finally, give a try to having the FPGA vi run when loaded/run when the crio boots by following these KBs:

http://decibel.ni.com/content/docs/DOC-3076

http://digital.ni.com/public.nsf/allkb/BC513C2A0DC29C89862574BF0002B0B9?OpenDocument

thanks,

D Smith

[jordankuehn]

Thanks D Smith,

After calling the phone support, I was able to identify and correct the issue causing the open reference to not execute.  For some reason, I needed to move an initialization VI that initializes a few FGVs to after the open FPGA reference. 

At that point your advice came in quite usefull.  I was unaware of the distributed system manager.  Once I opened that I saw two more issues (which may have contributed to the other issue).  I was out of system memory and the processor was pegged at 100%.  I put together a custom firware package which has helped reduce the memory load (I've already taken steps to minimize the size of the software) and have also utilized timed loops to prioritize functionality and reduce CPU load.