Questions about high throughput math function handshaking

[zyb1003]

Hello everyone, 

I read some materials about handshaking things and here just want to confirm if my understanding is right or not. 

Here is my program screenshot:

High throughput math function requires to output data every cycle in single cycle time loop. Let's take arctan function for example. If the input valid port is false, does arctan function also output a data? If it is, the output valid port should be false, too. This means it just output a invalid data to the DMA FIFO.write (fpga to host 2) in the screenshot. The input valid port of DMA FIFO.write should be false, and does this means the data didn't actually write into DMA FIFO? 

Also, if above thinking is right, the arctan function here has 16 cycles latency. So I think that means it takes 16 cycles to output a valid data? If it is true, then there is a problem. If the input data in the first cycle is valid, the arctan function takes 16 cycles to calculate it. But when it comes to the 16th cycle, if the input valid port of arctan turns to be false, then I think the output valid port turns to be false, so it means the output is invalid, so the data that should be valid cannot be written into the DMA FIFO!?!?

I really hope you guys can help me with this question that bothered me for a long time. 

Thank you

[Dragis · Accepted solution]

Each of the handshake signals can operate independently. It is not necessary for input valid to be asserted true on the same cycle that output valid would be true. Each operation, depending on it's implementation, such as throughput, pipeline depth, and other settings, may consume and produce data at different times.

For instance, a fully pipelined operation may be able to take a new input value on every clock cycle. Therefore, ready for input will always be true and output valid is simply delayed from the input valid signal, assuming ready for output remains true.

I recommend reviewing http://zone.ni.com/reference/en-XX/help/371599F-01/lvfpgaconcepts/fpga_handshaking which gives a nice overview of the handshake use cases.