SPI when using slow and fast modules

[nlammens84]

I'm building a control system using LabVIEW on a cRIO device. The chassis has 3 high-speed modules (AI, AO and DIO at 100kS/s) and one slow module (NI 9211 for thermocouples at max 14S/s).

I have to control pressure and temperature inside a chamber. The temperature evolves slowly, so no special need for fast control. The pressure however reacts very fast so I need the high speed of the AI and AO to control the system.

I was reading the cRIO dev guide and browsing the internet, but am confused about one thing:

1. I understand that all my modules have to communicate with the FPGA using SPI and that there is only 1 channel available. So all requests to modules have to go through one channel, meaning each command has to wait in line waiting for the previous command to complete.
2. On the other hand, info I found at NI suggests that you can never sample faster than what the module specs are. Even if I set my FPGA loop to run at 40Mhz and only read out 1 thermocouple channel, the actual loop rate will be limited to 14Hz.

So to me, (2) suggests that the read command for a TC channel actually blocks the loop for approx 72ms (14Hz).

Lets say then, that I build a VI with two loops. The first loop is timed to run at 100kHz, reading out an AO-channel. The second loop is timed at 14Hz, reading a TC channel. In my understanding, every time the 2nd loop is called, it will block the entire VI for 72ms waiting for data. Assuming both loops are alternated every iteratioin, that would then mean that my 1st loop would only achieve 14Hz as well?

I can't really believe this is how DAQ works, because this would mean I have to buy a TC module capable of 100kHz just because I want other modules to run at that speed (assuming such a module would even exist and give accurate results).

I could imagine that the modules actually have and internal interrupt that's switched when new data is available. If the I/O nodes then wait for that interrupt when called, this could explain why you can never sample faster, but would enable you to measure other data at higher speeds. This is however, just something I came up with, and could not find any information regarding this subject.

Could someone enlighten me as to how the communication process actually works?

[ThiCop]

Hello nlammens,

I think there might be some confusion about how the acquisition on the cRIO will be done.

If you use a NI 9211 thermocouple module, then this module can only produce a new "value"/"measurement" each 70 ms because of the internal conversion time for the thermocouple measurement.

If you use this module in a cDAQ, then your actual maximum sample rate will be indeed around 14 S/s.

If you're working on a cRIO, then from the FPGA side you'll be able to check the "most recent measurement" way faster.

You could compare it to "checking a register value" as fast as possible.

For this communication they indeed use the SPI communication.

What you will notice that this "register value" will only change every 70 ms.

So if you do this reading more frequently than at 14 Hz, then you'll get a "constant measurement" that changes each 70 ms.

So it will not block your SPI-communication and you should be able to do analog measurements at high rates in other parallel loops.

I hope I have made it more understandable.

If not, then please let us know.

[Christian Mergl]

Just want to add that not all modules communicate via SPI with the FPGA, some have direct connections.

Christian