Transfering data from FPGA to RT in cRio

[falkpl]

What is the best method of transfering a cluster of data from an fpga to a RT target (using a sbrio).

I have the FPGA generating datapackets of a fixed size (essentially a cluster of data) it generates these packets of fixed size (128Bytes/Packet) sent asynchronously from My FPGA to the RT code.  The packest are generated at a rate of 0-1000 per second.  In traditional labview this would be a simple Producer Consumer architecture with the cluster type of queue.  I have some ideas for FPGA but want to use the recomended architecture.

Any resources or ideas are welcome.

[mishkin]

Hey Paul,

The only two mechanisms for transferring data from the FPGA to RT host are the following: 

1. DMA FIFO (lossless unless we overflow). 

2. Read/Write indicators (lossy)

In your case it sounds like you'll want to use the DMA FIFO - every time you generate a packet (cluster), write it to the FIFO. On the RT side, read from the FIFO. You can find examples of a couple FPGA-Host transfer mechanisms here: Example Finder > Hardware Input and Output > CompactRIO > FPGA Fundamentals > Host Synchronization.

Are you just looking to transfer the packets over, or do you need to transfer additional info about the packets? If you're looking for which FPGA - Host synchronization method to use (as opposed to which mechanism to use), I'd take a look at the following: What is the Best Method For Synchronizing a LabVIEW FPGA and a Host Interface VI?

Cheers

[falkpl]

Thanks I will check out the link.  I guess i will have to convert the cluster of data to a fixed array and then send multiple Bytes at a time.  Is there any way to make this atomic, that is write the whole packet at a time and block the removal until the whole packet is in the FIFO, maybe this doesnt matter since it is a queue.

[mishkin · Accepted solution]

Yes, you'll have to send the elements one by one to the host through the FIFO. You can configure the FIFO datatype to be up to 64 bits long (and bit-pack half of your packet into that datatype). Or, you can keep the FIFO datatype 1 byte long and send 128 elements per packet. In this case, you could do something like this on the host:

This would prevent the host from pulling elements from the FIFO until the whole packet is received.

[falkpl]

Thanks I think I got it working, I write 128 (could change but should not matter) bytes in one operation, then wait for a 128 bytes like you suggest + make the first 2-Byte a start byte check xFFFF (invalid in my current data scheme) and this will determine if I have a true packet, I will add a checksum byte at the end just for to be sure.  Thanks again.

[mishkin]

Glad to hear you got it up and running, Paul!