fpga

[Mohamedbakr80]

Hi, I am developing a real time application using a cRIo, I am trying to do sequential control.

I need a loop to run for a certain time (10 sec), and then move to the next sequence, and so on.

The problem is I cannot find a function in the FPGA module, that is similar to elapsed time express VI.

[mikeporter]

You can have more than one separate function in the FPGA. Create the higher level program structure in the RT environment and make calls to the FPGA to do specific things.

Mike...

[Mohamedbakr80]

Thanks for your reply, the problem is there will be like 7 or 8 separate FPGA VI's, is there a way to get task done by only one, like doing a task for 10 seconds, then doing the next and so on?

[crossrulz]

Sounds like a simple state machine inside of your FPGA.  You could also just use commands of some type to tell the FPGA to do something different.  You should be able to easily combine your FPGA VIs into a single bit file.

[Mohamedbakr80]

Thanks alot, but how do I use a timer in a state machine for a sequential task inside FPGA?,I need it to perform a certain task for 10 seconds and then move to the next task and so on. without the the need for elapsed time express VI?

Do you have example code please?

[crossrulz]

You can use the Loop Timer function to get how much time has elapsed.

[Mohamedbakr80]

I need to time the loop,to do a certain task for a pre-defined time. take an input measurement for 10 seconds,  take the average, then change output to change speed of the motor for another 10 seconds take the input and so on. 

[crossrulz]

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@Mohamedbakr80 wrote:

I need to time the loop,to do a certain task for a pre-defined time. take an input measurement for 10 seconds,  take the average, then change output to change speed of the motor for another 10 seconds take the input and so on. 

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Honestly, that sounds like something that should be taken care of in the RT.  The FPGA should be used for sampling the data and sending it through a DMA to the RT.  The RT can then tell the FPGA the motor speed.  The FPGA should also be keeping the motor running at the desired speed.